Patents by Inventor Leung Kin Chiu

Leung Kin Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240159714
    Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
  • Patent number: 11815492
    Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: November 14, 2023
    Assignee: BFLY Operations, Inc.
    Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
  • Patent number: 11529127
    Abstract: Ultrasound apparatus and methods of processing signals are described. The ultrasound apparatus may include multiple channels. In some embodiments, signal processing techniques are described, which in some embodiments are performed on a per-channel basis. The signal processing techniques may involve using down-conversion and filtering of signals on multiple channels. The down-conversion and filtering may be done prior to beamforming.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: December 20, 2022
    Assignee: BFLY OPERATIONS, INC.
    Inventors: Leung Kin Chiu, Karl Thiele, Nevada J. Sanchez, Sheng-Wen Huang
  • Publication number: 20210325349
    Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 21, 2021
    Applicant: Butterfly Network, Inc.
    Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
  • Publication number: 20210328564
    Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 21, 2021
    Applicant: Butterfly Network, Inc.
    Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
  • Publication number: 20200405271
    Abstract: Ultrasound apparatus and methods of processing signals are described. The ultrasound apparatus may include multiple channels. In some embodiments, signal processing techniques are described, which in some embodiments are performed on a per-channel basis. The signal processing techniques may involve using down-conversion and filtering of signals on multiple channels. The down-conversion and filtering may be done prior to beamforming.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 31, 2020
    Inventors: Leung Kin Chiu, Karl Thiele, Nevada J. Sanchez, Sheng-Wen Huang
  • Publication number: 20190299251
    Abstract: Aspects of technology described herein relate to ultrasound apparatuses including capacitive micromachines ultrasonic transducers (CMUTs) that are directly electrically coupled to delta-sigma analog-to-digital converters (ADCs). The apparatus may lack an amplifier or multiplexer between each CMUT and delta-sigma ADC. The apparatus may include between 100 and 20,000 CMUTs and between 100 and 20,000 delta-sigma ADCs, each of the CMUTs directly electrically coupled to one of the delta-sigma ADCs. The CMUTs and the delta-sigma ADCs may be monolithically integrated on a single substrate. The delta-sigma ADCs may lack an integrator distinct from the CMUT. An internal capacitance of the CMUT may serve as an integrator for the delta-sigma ADC.
    Type: Application
    Filed: June 18, 2019
    Publication date: October 3, 2019
    Applicant: Butterfly Network, Inc.
    Inventors: Chao Chen, Kailiang Chen, Leung Kin Chiu, Youn-Jae Kook, Keith G. Fife
  • Patent number: 10038577
    Abstract: One example includes a system that is comprised of an equalizer, a counter, and a controller. The equalizer equalizes an incoming signal and provide an equalized output signal over a plurality of time intervals according to a given equalizer setting thereof. The counter provides a count value to represent to a number of times that the equalized output signal crosses each of a plurality of thresholds over the plurality of time intervals. The controller evaluates the count value for each of the plurality of thresholds at each of a plurality of equalizer settings and configures the equalizer setting based on the evaluation of the count values for each of the equalizer settings.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: July 31, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Amit Rane, Roland Ribeiro, Leung Kin Chiu
  • Publication number: 20180191534
    Abstract: One example includes a system that is comprised of an equalizer, a counter, and a controller. The equalizer equalizes an incoming signal and provide an equalized output signal over a plurality of time intervals according to a given equalizer setting thereof. The counter provides a count value to represent to a number of times that the equalized output signal crosses each of a plurality of thresholds over the plurality of time intervals. The controller evaluates the count value for each of the plurality of thresholds at each of a plurality of equalizer settings and configures the equalizer setting based on the evaluation of the count values for each of the equalizer settings.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 5, 2018
    Inventors: AMIT RANE, Roland Ribeiro, Leung Kin Chiu