Abstract: Described herein are techniques of characterizing electrical characteristics of a battery cell. The techniques employ a battery monitor coupled to a battery to measure voltage of the battery cell when it is in a recovery state after application of a stimulus (e.g., discharging or charging the battery). The measured voltage of the battery cell in the recovery state is then used to generate a characterization of the battery cell. The characterization may be used, for example, to match the battery cell with one or more similar battery cells to be coupled in a battery pack. In another example, the characterization may be used to verify authenticity of the battery cell.

Abstract: Systems and methods for detecting, isolating, and diagnosing machine faults are discussed. An exemplary system includes a network of sensor nodes deployed at machines or machine components to sense information of machine characteristics, and to generate physical or statistical features using the sensed machine characteristics. A cloud-computing device, communicatively coupled to the sensor network, can provide cloud-based services including detecting a machine fault, diagnosing a fault type, or estimating time to machine failure. A user interface associated with a client device can alert a user of the detected fault, such that the user can take preventive actions to minimize machine downtime.

Abstract: A clock alignment detector described herein can detect alignment between clock signals within a defined margin of error, such as a defined margin of phase error. The margin of phase error can be varied to achieve various degrees of lock detection precision. Clock alignment detector can detect alignment between rising edges of the clock signals, falling edges of the clock signals, or both the rising and falling edges of the clock signals. The clock alignment detector can be implemented as a lock detector for a phase-locked loop that is configured to detect and maintain a phase relationship between a reference clock signal and a feedback clock signal, where the clock alignment detector detects alignment between the reference clock signal and the feedback clock signal.

Abstract: A clock alignment detector described herein can detect alignment between clock signals within a defined margin of error, such as a defined margin of phase error. The margin of phase error can be varied to achieve various degrees of lock detection precision. Clock alignment detector can detect alignment between rising edges of the clock signals, falling edges of the clock signals, or both the rising and falling edges of the clock signals. The clock alignment detector can be implemented as a lock detector for a phase-locked loop that is configured to detect and maintain a phase relationship between a reference clock signal and a feedback clock signal, where the clock alignment detector detects alignment between the reference clock signal and the feedback clock signal.