Patents by Inventor Li-An Chu

Li-An Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12002774
    Abstract: An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hong Chang, Chun-Yi Yang, Kun-Ming Huang, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
  • Patent number: 12002867
    Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, a layer of dielectric material over the gate structure, a source/drain (S/D) contact layer formed through and adjacent to the gate structure, and a trench conductor layer over and in contact with the S/D contact layer. The S/D contact layer can include a layer of platinum-group metallic material and a silicide layer formed between the substrate and the layer of platinum-group metallic material. A top width of a top portion of the layer of platinum-group metallic material can be greater than or substantially equal to a bottom width of a bottom portion of the layer of platinum-group metallic material.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Hung Chu, Shuen-Shin Liang, Hsu-Kai Chang, Tzu Pei Chen, Kan-Ju Lin, Chien Chang, Hung-Yi Huang, Sung-Li Wang
  • Patent number: 11993863
    Abstract: A metal product includes a metal substrate, at least one first hole, at least one second hole, and at least one third hole. The first hole is formed in a surface of the metal substrate. The second hole is formed in at least one of a portion of the surface of the metal substrate without the first hole and an inner surface defining the first hole. The third hole is formed in at least one of a portion of the surface of the metal substrate without the first hole and without the second hole, a portion of the inner surface defining the first hole without the second hole, and an inner surface defining the second hole. The first, second, and third holes enhance a bonding strength between the metal product and a material product. The disclosure also provides a metal composite and a method for manufacturing the metal product.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: May 28, 2024
    Assignee: Fulian Yuzhan Precision Technology Co., Ltd
    Inventors: Yu-Mei Hu, Shi-Chu Xue, Li-Ming Shen, Zheng-Quan Wang, Dong-Xu Zhang, Zhong-Hua Mai, An-Li Qin, Qing-Rui Wang, Ching-Hao Yang, Kar-Wai Hon, Hao Zhou
  • Patent number: 11990376
    Abstract: A semiconductor device and a method of making the same are provided. A method according to the present disclosure includes forming a first type epitaxial layer over a second type source/drain feature of a second type transistor, forming a second type epitaxial layer over a first type source/drain feature of a first type transistor, selectively depositing a first metal over the first type epitaxial layer to form a first metal layer while the first metal is substantially not deposited over the second type epitaxial layer over the first type source/drain feature, and depositing a second metal over the first metal layer and the second type epitaxial layer to form a second metal layer.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peng-Wei Chu, Sung-Li Wang, Yasutoshi Okuno
  • Publication number: 20240163119
    Abstract: This disclosure discloses a device management method, system, and apparatus. The method includes: A second device sends an identity file to a first access control node, to indicate the first access control node to store the identity file in a file system, where the identity file includes identity information of a first device and a public key of the second device. The second device receives a first identifier sent by the first access control node. The first identifier is used to read the identity file from the file system. After verification is performed on the second device and information about a device associated with the first device in association information and succeeds, the first access control node sends the identity file to the file system. The association information is stored in a database node and a blockchain.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Inventors: Haiguang WANG, Xin KANG, Tieyan LI, Cheng Kang CHU, Zhongding LEI
  • Patent number: 11981925
    Abstract: Human decidual placental mesenchymal stem cell having an increased expression level of decoy receptor 3 (DcR3), and a method for obtaining the human decidual placental mesenchymal stem cells having an increased expression level of DcR3 are provided, wherein human decidual placental mesenchymal stem cells are cultured in a culture dish containing a serum-free medium and the DcR3 expression of the human decidual placental mesenchymal stem cells are increased by stimulation of at least one inflammatory cytokine for 48 hours, and obtaining the human decidual placental mesenchymal stem cells having an increased expression level of DcR3, wherein the increased expression level of DcR3 is significantly higher than that of human decidual placental mesenchymal stem cells with the stimulation is higher than that of human decidual placental mesenchymal stem cells cultured without the stimulation of the at least one inflammatory cytokine.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: May 14, 2024
    Assignee: BIOSPRING MEDICAL CO., LTD.
    Inventors: Li-Li Chu, Meng-Shiue Wu
  • Patent number: 11974590
    Abstract: The patent discloses halophilic bacteria and a method for fermenting fish paste, belonging to the technical field of solid-state fermentation of aquatic products using microorganisms. Four kinds of screened halophilic bacteria were used as mixed starter culture to produce fish paste. The effects of the ratio of mixed starter culture, inoculation amount, fermentation temperature, fermentation time and salinity on fish paste were studied by determining physical and chemical indexes and performing sensory evaluation. The fish paste has the characteristics of high safety, low salinity, high flavor and nutrition value. This method of fish paste processing needs short fermentation time. The fermented products of fish paste with better flavor can be obtained by using the mixed starter culture.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: May 7, 2024
    Assignee: Jiangsu University
    Inventors: Ruichang Gao, Zhiying Zheng, Li Yuan, Xiaoyun Wu, Qiaozhen Zhou, Qian Chu
  • Publication number: 20240145653
    Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.
    Type: Application
    Filed: May 12, 2023
    Publication date: May 2, 2024
    Applicant: HANNSTAR DISPLAY CORPORATION
    Inventors: Chun-I Chu, Yu-Chi Chiao, Yung-Li Huang, Hung-Ming Chang, Cheng-Yu Lin, Huan-Hsun Hsieh, CHeng-Pei Huang
  • Patent number: 11970479
    Abstract: The present invention is directed to cinnolinyl and quinolinyl pyrazol-4-yl-pyridine compounds which are allosteric modulators of the M4 muscarinic acetylcholine receptor. The present invention is also directed to uses of the compounds described herein in the potential treatment or prevention of neurological and psychiatric disorders and diseases in which M4 muscarinic acetylcholine receptors are involved. The present invention is also directed to compositions comprising these compounds. The present invention is also directed to uses of these compositions in the potential prevention or treatment of such diseases in which M4 muscarinic acetylcholine receptors are involved.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: April 30, 2024
    Assignees: Merck Sharp & Dohme LLC, MSD R&D (China) Co. LTD.
    Inventors: John J. Acton, III, Melissa Egbertson, Xiaolei Gao, Scott T. Harrison, Timothy J. Henderson, Michael Man-Chu Lo, Robert D. Mazzola, Jr., Zhaoyang Meng, James Mulhearn, Vanessa L. Rada, Jeffrey W. Schubert, Oleg B. Selyutin, David M. Tellers, Ling Tong, Fengqi Zhang, Jianming Bao, Chunsing Li
  • Patent number: 11972974
    Abstract: An IC structure includes a transistor, a source/drain contact, a metal oxide layer, a non-metal oxide layer, a barrier structure, and a via. The transistor includes a gate structure and source/drain regions on opposite sides of the gate structure. The source/drain contact is over one of the source/drain regions. The metal oxide layer is over the source/drain contact. The non-metal oxide layer is over the metal oxide layer. The barrier structure is over the source/drain contact. The barrier structure forms a first interface with the metal oxide layer and a second interface with the non-metal oxide layer, and the second interface is laterally offset from the first interface. The via extends through the non-metal oxide layer to the barrier structure.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu, Mrunal Abhijith Khaderbad, Keng-Chu Lin
  • Patent number: 11960920
    Abstract: A data management system comprises: a storage appliance configured to store a snapshot of a virtual machine; and one or more processors in communication with the storage appliance. The one or more processors are configured to perform operations including: identifying a plurality of shards of the virtual machine; requesting a snapshot of each of the plurality of shards; receiving the shards asynchronously; ordering the received snapshot shards sequentially into a results queue; and storing a single snapshot of the virtual machine based on the ordered snapshot shards. Operations may further include maintaining a flow control queue that limits the number of snapshot shards requested.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: April 16, 2024
    Assignee: Rubrik, Inc.
    Inventors: Christopher Denny, Li Ding, Linglin Yu, Stephen Chu, Ying Wu
  • Publication number: 20240112945
    Abstract: In one embodiment, a susceptor for thermal processing is provided. The susceptor includes an outer rim surrounding and coupled to an inner dish, the outer rim having an inner edge and an outer edge. The susceptor further includes one or more structures for reducing a contacting surface area between a substrate and the susceptor when the substrate is supported by the susceptor. At least one of the one or more structures is coupled to the inner dish proximate the inner edge of the outer rim.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Inventors: Anhthu NGO, Zuoming ZHU, Balasubramanian RAMACHANDRAN, Paul BRILLHART, Edric TONG, Anzhong CHANG, Kin Pong LO, Kartik SHAH, Schubert S. CHU, Zhepeng CONG, James Francis MACK, Nyi O. MYO, Kevin Joseph BAUTISTA, Xuebin LI, Yi-Chiau HUANG, Zhiyuan YE
  • Publication number: 20240093387
    Abstract: An alkaline electrolyte membrane (AEM) electrolytic device is designed, assembled and evaluated for water electrolysis, composed of an anode for oxygen generation, a cathode for hydrogen generation, an AEM for anion conductive, and two internal water gas separators (IWGSs) for water supplying to the anode and the cathode, respectively, as well as for automatically separation of water and gas produced from the anode or from the cathode. There is no need of pumps for water and gas circulations and no external water gas separators (EWGSs) that are used by conventional water electrolyzers. The corrosive electrolyte is confined in the water containers and will not damage other parts in the electrolytic device. Furthermore, novel multi gas diffusion layers are used to replace the conventional single gas diffusion layer. The pore size is configurable to improve the mass transfer of electrochemical reactions and promote electrochemical reactions.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 21, 2024
    Inventors: Rongzhong Jiang, Jiangtian Li, Deryn D. Chu, David R. Baker
  • Publication number: 20240088261
    Abstract: The structure of a semiconductor device with dual silicide contact structures and a method of fabricating the semiconductor device are disclosed. A method of fabricating the semiconductor device includes forming first and second fin structures on a substrate, forming first and second epitaxial regions on the first and second fin structures, respectively, forming first and second contact openings on the first and second epitaxial regions, respectively, selectively forming an oxide capping layer on exposed surfaces of the second epitaxial region, selectively forming a first metal silicide layer on exposed surfaces of the first epitaxial region, removing the oxide capping layer, and forming first and second conductive regions on the metal silicide layer and on the exposed surfaces of the second epitaxial region, respectively. The first metal silicide layer includes a first metal. The first and second conductive regions includes a second metal different from the first metal.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Peng-Wei CHU, Yasutoshi OKUNO, Ding-Kang SHIH, Sung-Li WANG
  • Publication number: 20240071926
    Abstract: A semiconductor structure includes a first field-effect transistor having a first back side source/drain contact, a second back side source/drain contact, and a first power line and a first signal line each connected to the first back side source/drain contact and the second back side source/drain contact, respectively. The semiconductor structure further includes a second field-effect transistor vertically stacked above the first field-effect transistor. The second field-effect transistor having a first front side source/drain contact, a second front side source/drain contact, and a first power line and a first signal line each connected to the first front side source/drain contact and the second front side source/drain contact, respectively.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Tao Li, Ruilong Xie, David Wolpert, Albert M. Chu
  • Publication number: 20240036265
    Abstract: A fiber optic adapter includes an outer housing, a receiving seat, and a blocking mechanism. The outer housing defines two connection slots. The receiving seat is connected detachably to the outer housing, and defines two through grooves respectively in spatial communication with the connection slots. The blocking mechanism includes a pivot shaft, a torsion spring sleeved on the pivot shaft, and two cover plates connected pivotally to the pivot shaft and respectively connected to two opposite ends of the torsion spring. When each cover plate is in a blocking position, the cover plate blocks a respective connection slot, and is inclined relative to a central axis of the respective connection slot with a free end thereof being more towards the rear than the pivot shaft, and with an angle that is defines between the cover plate and the central axis being not a right angle.
    Type: Application
    Filed: December 16, 2022
    Publication date: February 1, 2024
    Inventors: Hsien-Hsin HSU, Wu-Li CHU, Yen-Chang LEE, Shu-Bin LI
  • Publication number: 20230326221
    Abstract: Disclosed herein are a system for identifying cells on a microscopic image. According to some embodiments, the system comprises a non-transitory processor-readable medium, and a processor communicably configured to receive the microscopic image, and process the received microscopic image with a convolutional neural network (CNN) model having a modified U-Net architecture. Also disclosed herein are methods for identifying a spatial pattern of human induced pluripotent stem cells (hiPSCs) by using the present system.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Applicants: Chung Yuan Christian University, RIKEN
    Inventors: Slo-Li CHU, Kuniya ABE, Hideo YOKOTA, Ming-Dar TSAI
  • Publication number: 20230268262
    Abstract: A method of manufacturing an electronic package is provided and includes disposing a circuit member and a plurality of electronic elements on opposite sides of a carrier structure having circuit layers respectively, so that any two of the plurality of electronic elements can be electrically connected to each other via the circuit layers and the circuit member, where a vertical projected area of the carrier structure is larger than a vertical projected area of the circuit member, such that the circuit member is free from being protruded from side surfaces of the carrier structure. Therefore, the circuit member replaces a part of circuit layers of the carrier structure to reduce the difficulty of fabricating the circuit layers in the carrier structure.
    Type: Application
    Filed: May 23, 2022
    Publication date: August 24, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Li-Chu Chang, Yuan-Hung Hsu, Don-Son Jiang
  • Publication number: 20230151746
    Abstract: A cleaning system of a vehicle oil circuit is provided, including a filter unit, an oil storage unit and a flushing unit. The filter unit includes a filter chamber, a first oil inlet tube and an oil outlet tube. The first oil inlet tube is communicated with a first opening of the vehicle oil circuit. The oil outlet tube is communicated with a second opening of the vehicle oil circuit. The oil storage unit includes a waste oil chamber and a second oil inlet tube communicated with a third opening of the vehicle oil circuit. The flushing unit includes a flushing chamber and a flushing tube. The flushing chamber receives a washing oil. The flushing tube is communicated respectively with the flushing chamber and a fourth opening of the vehicle oil circuit. The flushing tube guides the washing oil to enter the vehicle oil circuit.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 18, 2023
    Inventor: Li-Chu Liu
  • Publication number: 20230151745
    Abstract: A cleaning system for a vehicle oil circuit is provided, including a heat exchange unit. The heat exchange unit includes an oil inlet channel, a first container, a second container and an oil outlet channel. The first container is located within the second container. The first container defines a first space communicated with the oil inlet channel and the oil outlet channel, and the first container and the second container define a second space therebetween and non-communicated with the first space. The oil inlet channel guides an oil from the vehicle oil circuit to the first space, and the oil outlet channel discharges the oil from the first space. The first space receives the oil, and the second space receives a detergent. When the oil is in the first space, a heat of the oil is transferred to the detergent through the first container.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 18, 2023
    Inventor: Li-Chu Liu