Abstract: Certain aspects of a method and system for a delay locked loop for a rake receiver are disclosed. Aspects of one method may include normalizing a signal power of a first control channel based on a threshold value. A sampling time associated with at least one or more of the following: the first control channel, a second control channel, an on-time control channel, and a data channel, may be adjusted based on a comparison between the normalized signal power of the first control channel and a signal power of the second control channel. The second control channel may be delayed with respect to the first control channel by a particular time period. The first and second control channels may be common pilot control channels (CPICHs). The combined signal power of the first control channel may be normalized based on said threshold value.

Abstract: Aspects of a method and system for interference suppression in WCDMA systems may include one or more circuits that are operable to receive a plurality of multipath signals via one or more receiving antennas. A plurality of weighting factor values may be computed based on the received multipath signals. Estimated signals may be based on the weighting factor values. Residual signals may be generated based on received signals and the estimated signals. Addback signals may be generated based on the estimated signals and the residual signals. Updated estimated signals may be generated based on the addback signals and the weighting factor values. Incremental signals may be generated based on the updated estimated signals and addback signals. Updated residual signals may be generated based on the incremental signals and previous residual signals. The interference suppressed signals may be generated based on the updated residual signals and updated estimated signals.

Abstract: A wireless device for implementing Incremental Redundancy (IR) operations includes system processing circuitry operable to perform Physical (PHY) layer operations, Media Access Control (MAC) layer operations and Radio Link Control (RLC) operations of the wireless device. The system processing circuitry further includes an IR control module for processing IR transactions related to a received RLC data block and for tracking an Automatic Repeat Request (ARQ) receiving state and received block bit map and a Layer 1 (L1) module for intercepting and diverting the IR transactions to the IR control module and for passing a correctly decoded RLC data block to the RLC layer operations via the MAC layer operations thereby automatically synchronizing the RLC layer operations. An IR processing module is coupled to the system processing circuitry to perform IR operations on the received RLC data block based upon a direction from the IR control module.

Abstract: A method and system for ciphering interface with list processing is described. Various aspects of a system for ciphering interface with list processing may include a cipher module that enables deciphering and/or bit stuffing, in hardware, of a potion of one of a plurality of data blocks starting at any bit location that is subsequent to a first bit of the one of the plurality of data blocks. One of the plurality of data blocks may comprise at least one data word. A modulus of a number representing the bit location with respect to a number of bits in the one of the data words may be a number greater than 0. The cipher module may enable selection of any bit location based on and index and/or an offset. The cipher module may enable selection of deciphering and/or bit stuffing based on configured information.

Abstract: Aspects of a method and system for interference suppression in WCDMA systems may include one or more circuits that are operable to receive a plurality of multipath signals via one or more receiving antennas. A plurality of weighting factor values may be computed based on the received multipath signals. Estimated signals may be based on the weighting factor values. Residual signals may be generated based on received signals and the estimated signals. Addback signals may be generated based on the estimated signals and the residual signals. Updated estimated signals may be generated based on the addback signals and the weighting factor values. Incremental signals may be generated based on the updated estimated signals and addback signals. Updated residual signals may be generated based on the incremental signals and previous residual signals. The interference suppressed signals may be generated based on the updated residual signals and updated estimated signals.

Abstract: Certain aspects of a method and system for a delay locked loop for a rake receiver are disclosed. Aspects of one method may include normalizing a signal power of a first control channel based on a threshold value. A sampling time associated with at least one or more of the following: the first control channel, a second control channel, an on-time control channel, and a data channel, may be adjusted based on a comparison between the normalized signal power of the first control channel and a signal power of the second control channel. The second control channel may be delayed with respect to the first control channel by a particular time period. The first and second control channels may be common pilot control channels (CPICHs). The combined signal power of the first control channel may be normalized based on said threshold value.

Abstract: A baseband processing module of a wireless terminal includes a Turbo decoding module. The Turbo decoding module decodes a Turbo code word to produce one or more Media Access Control (MAC) packet(s) carried by the turbo decode word. Each MAC packet includes a MAC packet header and the MAC packet payload, which carries one or more Radio Link Control (RLC) Packet Data Units (PDUs). The Turbo decoding module decodes the MAC packet header to determine boundaries of the PDUs carried in the MAC packet payload. The Turbo decoding module decodes RLC PDU headers and RLC PDU payloads of the RLC PDUs. The Turbo decoding module writes the decoded MAC packet header, the decoded RLC PDU headers, and the decoded RLC PDU payloads to memory in a word-aligned format. The Turbo decoding module may also operate in various other Turbo decoding modes.

Abstract: A wireless device for implementing Incremental Redundancy (IR) operations includes an IR memory dedicated to storing data related to the IR operations. The IR memory includes a Type I IR memory adapted to store IR status information of a Radio Link Control (RLC) data block and a Type II IR memory adapted to store the RLC data block.

Abstract: In a method and system for an adaptive automatic gain control (AGC) reference for HSDPA and WCDMA, A RF receiver, comprising a RF front-end, may receive a signal comprising a pilot signal via WCDMA or HSDPA. The operation mode of the RF front-end of the RF receiver may be determined based on the received signal components such as a HS-PDCH, a HS-SCCH, and/or a CPICH. The received signal strength information (RSSI) of the received signal may be determined from the output of a matched filter within the RF receiver. A true RSSI, which may be indicated by the received signal code power (RSCP), may be determined based on the pilot symbols over the CPICH. The operation mode determined for the receiver's RF front-end, the determined RSSI, and the determined CPICH_RSCP, may be provided as inputs to an automatic-gain-control (AGC) loop or circuit within the receiver front-end.

Abstract: Methods and systems for audio CODEC voice ADC processing are disclosed. Aspects of one method may include using a decimating filter that may be enabled to generate 13 MHz, 9-level digital output signal from a 26 MHz, 3-level digital input signal. The 13 MHz, 9-level digital output signal may be processed for RF transmission, for audio output to an output device, and/or utilized for testing by a test fixture, for example. The 13 MHz, 9-level digital output signal may be further processed to generate a 6.5 MHz, 33-level digital signal. The 6.5 MHz, 33-level digital signal may be converted to an analog signal, and processed for audio output and/or testing. The 13 MHz, 9-level digital output signal may also be processed to generate a 40 KHz, 17-bit digital signal, which may be communicated to a test equipment or further processed for RF transmission.

Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.

Abstract: Methods and systems for detecting, and controlling power for, an auxiliary microphone are disclosed. Aspects of one method may include a detection block intermittently enabling a bias circuit block to provide a bias signal to determine if an auxiliary microphone may be communicatively coupled to a mobile device. The detection block may process 1-bit digital samples received from the bias circuit bock to determine whether the auxiliary microphone may be communicatively coupled. The detection block may also process the 1-bit digital samples to determine if a button associated with the auxiliary microphone may have been pushed or activated.

Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives at least one set of IR samples from the memory, forms a turbo code word from the at least one set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching, performs error detection operations, and extracts information from a MAC packet that it produces.

Abstract: A method and system for pipelined processing in an integrated embedded image and video accelerator is described. Aspects of a system for pipelined processing in an integrated embedded image and video accelerator may include circuitry that enables pipeline processing of video data within a single chip, wherein the pipeline processing may further include decoding of a block of video data while simultaneously inverse transforming a previously decoded block of video data. Aspects of the system may also include circuitry that enables transformation, within the single chip, of a block of said video data while simultaneously encoding, within said single chip, a previously transformed block of video data.

Abstract: A method for processing signals in a communication system is disclosed and may include pipelining processing of a received HSDPA bitstream within a single chip. The pipelining may include calculating a memory address for a current portion of a plurality of information bits in the received HSDPA bitstream, while storing on-chip, a portion of the plurality of information bits in the received HSDPA bitstream that is subsequent to the current portion. A portion of the plurality of information bits in the received HSDPA bitstream that is previous to the current portion may be decoded during the calculating and storing. The calculation of the memory address for the current portion of the plurality of information bits may be achieved without the use of a buffer. Processing of the plurality of information bits in the received HSDPA bitstream may be partitioned into a functional data processing path and functional address processing path.

Abstract: Methods and systems for processing audio signals are disclosed herein. Aspects of the method may comprise controlling gain during multipath, multi-rate audio processing by generating a digital signal that is a product of an input digital signal and a gain coefficient derived from a lookup table, and coarse tuning the gain by bit-shifting the digital signal to generate a digital output signal. The gain may be fine-tuned utilizing a variable step size determined by interpolation. The gain coefficient may be partitioned into gain blocks, which may be twice a corresponding value in preceding gain blocks. The gain blocks may be partitioned into steps that represent particular gain values within a range associated with the gain block. The digital output signal may be ramped utilizing a linear interpolation of the gain coefficients over a number of samples of the input signal, where the number of samples is given as a power of two.

Abstract: A wireless communication device processes N Radio Frequency (RF) bursts contained within N slots of a digital communications time divided frame, wherein N is a positive integer greater than one. The wireless communication device includes an RF front end, a baseband processor, and an equalizer module. The RF front end is operable to receive the plurality of received RF bursts and to convert the RF bursts to corresponding baseband signals. The baseband processor is operable to receive the baseband signals, to pre-equalization process the baseband signals to produce processed baseband signals, and to post-equalization process soft decisions. The equalizer is operable to equalize the processed baseband signals to produce the soft decisions. These RF bursts may be contained in adjacent slots or, in non-adjacent slots, or in a combination of adjacent slots and non-adjacent slots.

Abstract: Methods and systems for audio CODEC voice ADC processing are disclosed. Aspects of one method may include using a decimating filter that may be enabled to generate 13 MHz, 9-level digital output signal from a 26 MHz, 3-level digital input signal. The 13 MHz, 9-level digital output signal may be processed for RF transmission, for audio output to an output device, and/or utilized for testing by a test fixture, for example. The 13 MHz, 9-level digital output signal may be further processed to generate a 6.5 MHz, 33-level digital signal. The 6.5 MHz, 33-level digital signal may be converted to an analog signal, and processed for audio output and/or testing. The 13 MHz, 9-level digital output signal may also be processed to generate a 40 KHz, 17-bit digital signal, which may be communicated to a test equipment or further processed for RF transmission.

Abstract: An audio codec in a baseband processor may be utilized for mixing audio signals received at a plurality of data sampling rates. The mixed audio signals may be up sampled to a very large sampling rate, and then down sampled to a specified sampling rate that is compatible with a Bluetooth-enabled device by utilizing an interpolator in the audio codec. The down-sampled signals may be communicated to Bluetooth-enabled devices, such as Bluetooth headsets, or Bluetooth-enabled devices with a USB interface. The interpolator may be a linear interpolator for which the audio codec may enable generation of triggering and/or coefficient signals based on the specified output sampling rate. An interpolation coefficient may be generated based on a base value associated with the specified output sampling rate. The audio codec may enable selecting the specified output sampling rate from a plurality of rates.

Abstract: An on-demand message system includes a profile proxy server and a plurality of message servers coupled to a wireless network for sending messages to mobile users under conditions specified by the users and sellers. Users provide profile information specifying categories and conditions for which they will receive messages. Sellers also provide profile information specifying conditions under which they want messages to be sent. A multicast message is sent and processed by target users in response to a predetermined event, e.g., location update, conveying information related to a seller for which target users have expressed an interest in receiving.