Patents by Inventor Li-Ling Liao

Li-Ling Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230066598
    Abstract: A package structure is provided. The package structure includes a redistribution structure over a substrate, a semiconductor die over the redistribution structure and electrically coupled to the substrate, and an underfill material over the substrate and encapsulating the redistribution structure and the semiconductor die. The underfill material includes an extension portion overlapping a corner of the semiconductor die and extending into the substrate.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Po-Chen LAI, Ming-Chih YEW, Li-Ling LIAO, Chin-Hua WANG, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20230063251
    Abstract: A semiconductor package includes a redistribution structure, a first conductive pillar and a second conductive pillar, and a semiconductor device. The redistribution structure has a first surface and a second surface opposite to the first surface. The first conductive pillar and the second conductive pillar are disposed on the first surface of the redistribution structure and electrically connected with the redistribution structure, wherein a maximum lateral dimension of the first conductive pillar is greater than a maximum lateral dimension of the second conductive pillar, and a topography variation of a top surface of the first conductive pillar is greater than a topography variation of a top surface of the second conductive pillar.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Ling Liao, Ming-Chih Yew, Che-Chia Yang, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20230069311
    Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate. The chip structure has an inclined sidewall, the inclined sidewall is at an acute angle to a vertical, the vertical is a direction perpendicular to a main surface of the chip structure, and the acute angle is in a range from about 12 degrees to about 45 degrees. The method also includes forming a protective layer to surround the chip structure.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Shu-Shen YEH, Po-Chen LAI, Che-Chia YANG, Li-Ling LIAO, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20230017688
    Abstract: A method for forming a chip package structure is provided. The method includes forming a dielectric layer over a redistribution structure. The redistribution structure includes a dielectric structure and a plurality of wiring layers in or over the dielectric structure. The method includes forming a first conductive bump structure and a shield bump structure over the dielectric layer. The first conductive bump structure is electrically connected to the wiring layers, and the shield bump structure is electrically insulated from the wiring layers. The method includes bonding a first chip structure to the redistribution structure through the first conductive bump structure. The first chip structure is electrically insulated from the shield bump structure, and the first chip structure extends across a first sidewall of the shield bump structure.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Inventors: Po-Chen LAI, Chin-Hua WANG, Ming-Chih YEW, Chia-Kuei HSU, Li-Ling LIAO, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20220406729
    Abstract: A package structure is provided. The package structure includes a redistribution structure and a first semiconductor die over the redistribution structure. The package structure also includes a wall structure laterally surrounding the first semiconductor die and the wall structure includes a plurality of partitions separated from one another. The package structure also includes an underfill material between the wall structure and the first semiconductor die. The package structure also includes a molding compound encapsulating the wall structure and the underfill material.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 22, 2022
    Inventors: Po-Chen LAI, Chin-Hua WANG, Ming-Chih YEW, Li-Ling LIAO, Tsung-Yen LEE, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20220139816
    Abstract: An organic interposer includes dielectric material layers embedding redistribution interconnect structures, package-side bump structures located on a first side of the dielectric material layers, and die-side bump structures located on a second side of the dielectric material layers. A gap region is present between a first area including first die-side bump structures and a second area including second die-side bump structures. Stress-relief line structures are located on, or within, the dielectric material layers within an area of the gap region in the plan view. Each stress-relief line structures may include straight line segments that laterally extend along a respective horizontal direction and is not electrically connected to the redistribution interconnect structures. The stress-relief line structures may include the same material as, or may include a different material from, a metallic material of the redistribution interconnect structures or bump structures that are located at a same level.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 5, 2022
    Inventors: Li-Ling LIAO, Ming-Chih YEW, Chia-Kuei HSU, Shu-Shen YEH, Po-Yao LIN, Shin-Puu JENG
  • Patent number: 10288696
    Abstract: An intelligent diagnosis system for a power module. The system includes a power module, a hardware checking module and a diagnostic module. The power module has a temperature sensing element for obtaining a temperature difference between a starting minimum temperature and a current temperature. The hardware checking module has a current sensing element, a voltage sensing element and a magnetic coupling closed loop detection element for obtaining the current, the output voltage and the input voltage of the power module, and the hardware loop status, respectively. The diagnostic module calculates the number of cycles that have been operated, a measured impedance and an instantaneous power based on those measurement results, and calculating a risk index based on the number of cycles that have been operated, the temperature difference, the measured impedance, the instantaneous power and the hardware loop status, thereby determining the accumulation of the abnormality index record.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: May 14, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Chung Chiu, Chih-Ming Tzeng, Li-Ling Liao, Yu-Lin Chao, Chih-Ming Shen, Ming-Kaan Liang, Chun-Kai Liu, Ming-Ji Dai
  • Publication number: 20180136287
    Abstract: An intelligent diagnosis system for a power module. The system includes a power module, a hardware checking module and a diagnostic module. The power module has a temperature sensing element for obtaining a temperature difference between a starting minimum temperature and a current temperature. The hardware checking module has a current sensing element, a voltage sensing element and a magnetic coupling closed loop detection element for obtaining the current, the output voltage and the input voltage of the power module, and the hardware loop status, respectively. The diagnostic module calculates the number of cycles that have been operated, a measured impedance and an instantaneous power based on those measurement results, and calculating a risk index based on the number of cycles that have been operated, the temperature difference, the measured impedance, the instantaneous power and the hardware loop status, thereby determining the accumulation of the abnormality index record.
    Type: Application
    Filed: November 16, 2016
    Publication date: May 17, 2018
    Inventors: Chih-Chung CHIU, Chih-Ming TZENG, Li-Ling LIAO, Yu-Lin CHAO, Chih-Ming SHEN, Ming-Kaan LIANG, Chun-Kai LIU, Ming-Ji DAI
  • Publication number: 20180040798
    Abstract: A structure of a thermoelectric module including at least one substrate, a thermoelectric device and an insulation protection structure is provided. The thermoelectric device is disposed on the substrate. The insulation protection structure surrounds the thermoelectric device. The thermoelectric device includes at least three electrode plates, first type and second type thermoelectric materials and a diffusion barrier structure. First and second electrode plates among the three electrode plates are disposed on the substrate. The first type thermoelectric material is disposed on the first electrode plate. The second type thermoelectric material is disposed on the second electrode plate. A third electrode plate among the three electrode plates is disposed on the first type and second type thermoelectric materials. The diffusion barrier structure is disposed on two terminals of each of the first type and second type thermoelectric materials.
    Type: Application
    Filed: September 30, 2017
    Publication date: February 8, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Li-Ling Liao, Ming-Ji Dai, Chun-Kai Liu, Cheng-Heng Kao, Cheng-Chieh Li, Jeffrey Snyder, Fivos Drymiotis
  • Publication number: 20160163950
    Abstract: A structure of a thermoelectric module including at least one substrate, a thermoelectric device and an insulation protection structure is provided. The thermoelectric device is disposed on the substrate. The insulation protection structure surrounds the thermoelectric device. The thermoelectric device includes at least three electrode plates, first type and second type thermoelectric materials and a diffusion barrier structure. First and second electrode plates among the three electrode plates are disposed on the substrate. The first type thermoelectric material is disposed on the first electrode plate. The second type thermoelectric material is disposed on the second electrode plate. A third electrode plate among the three electrode plates is disposed on the first type and second type thermoelectric materials. The diffusion barrier structure is disposed on two terminals of each of the first type and second type thermoelectric materials.
    Type: Application
    Filed: December 8, 2014
    Publication date: June 9, 2016
    Inventors: Li-Ling Liao, Ming-Ji Dai, Chun-Kai Liu, Cheng-Heng Kao, Cheng-Chieh Li, Jeffrey Snyder, Fivos Drymiotis
  • Patent number: 8664509
    Abstract: A thermoelectric apparatus includes a first and a second assemblies, at least a first and a second heat conductors. The first assembly includes a first and a second substrates, and several first thermoelectric material sets disposed between the first and second substrates. The first substrate has at least a first through hole. The second assembly includes a third and a fourth substrates, and several second thermoelectric material sets disposed between the third and fourth substrates. The fourth substrate has at least a second through hole. Each of the first and second thermoelectric material sets has a p-type and an n-type thermoelectric element. The first and second heat conductors respectively penetrate the first and second through holes. Two ends of the first heat conductor respectively connect the second and fourth substrates, while two ends of the second heat conductor respectively connect the first and third substrates.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: March 4, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Kai Liu, Ming-Ji Dai, Suh-Yun Feng, Li-Ling Liao
  • Patent number: 8609454
    Abstract: A self-assembly apparatus for assembling a plurality of devices with a predetermined aspect ratio is provided. The self-assembly apparatus includes a guiding element, a vibration device, and a magnetic field inducing device. The guiding element has a mesh structure. The vibration device is coupled to the guiding element and configured to vibrate the guiding element. The magnetic field inducing device is disposed below the guiding element and configured to generate a time-varying magnetic field to rotate each of the devices. Through a collective effect of the vibration of the guiding element, the time-varying magnetic field, and the self-gravity of each of the devices, the devices are positioned on a plate between the guiding element and the magnetic field inducing device through the mesh structure.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: December 17, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Ji Dai, Chun-Kai Liu, Heng-Chieh Chien, Li-Ling Liao, Ker-Win Wang, Yen-Lin Tzeng, Yan-Bo Lin
  • Publication number: 20130302935
    Abstract: A self-assembly apparatus for assembling a plurality of devices with a predetermined aspect ratio is provided. The self-assembly apparatus includes a guiding element, a vibration device, and a magnetic field inducing device. The guiding element has a mesh structure. The vibration device is coupled to the guiding element and configured to vibrate the guiding element. The magnetic field inducing device is disposed below the guiding element and configured to generate a time-varying magnetic field to rotate each of the devices. Through a collective effect of the vibration of the guiding element, the time-varying magnetic field, and the self-gravity of each of the devices, the devices are positioned on a plate between the guiding element and the magnetic field inducing device through the mesh structure.
    Type: Application
    Filed: July 17, 2012
    Publication date: November 14, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Ji Dai, Chun-Kai Liu, Heng-Chieh Chien, Li-Ling Liao, Ker-Win Wang, Yen-Lin Tzeng, Yan-Bo Lin
  • Publication number: 20120118346
    Abstract: A thermoelectric apparatus includes a first and a second assemblies, at least a first and a second heat conductors. The first assembly includes a first and a second substrates, and several first thermoelectric material sets disposed between the first and second substrates. The first substrate has at least a first through hole. The second assembly includes a third and a fourth substrates, and several second thermoelectric material sets disposed between the third and fourth substrates. The fourth substrate has at least a second through hole. Each of the first and second thermoelectric material sets has a p-type and an n-type thermoelectric element. The first and second heat conductors respectively penetrate the first and second through holes. Two ends of the first heat conductor respectively connect the second and fourth substrates, while two ends of the second heat conductor respectively connect the first and third substrates.
    Type: Application
    Filed: March 4, 2011
    Publication date: May 17, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Kai Liu, Ming-Ji Dai, Suh-Yun Feng, Li-Ling Liao