Abstract: A method of lithography process is provided. The method includes forming a conductive layer over a reticle. The method includes applying ionized particles to the reticle by a discharging device. The method includes forming a photoresist layer over a semiconductor substrate. The method includes securing the semiconductor substrate by a wafer electrostatic-clamp. The method also includes patterning the photoresist layer by emitting radiation from a radiation source via the reticle.

Abstract: An integrated circuit is provided and includes a multi-bit cell having multiple bit cells disposed in multiple cell rows. The bit cells include M bit cells, M being positive integers. A first bit cell of the bit cells and a M-th bit cell of the bit cells are arranged diagonally in different cell rows in the multi-bit cell. The multi-bit cell includes first to fourth cell boundaries. The first and second boundaries extend in a first direction and the third and fourth boundaries extend in a second direction different from the first direction. The first bit cell and a second bit cell of the bit cells abut the third cell boundary, and the first bit cell and a (M/2+1)-th bit cell of the bit cells abut the first cell boundary.

Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.

Abstract: An integrated circuit is provided and includes a multi-bit cell having multiple bit cells disposed in multiple cell rows. The bit cells include M bit cells, M being positive integers. A first bit cell of the bit cells and a M-th bit cell of the bit cells are arranged diagonally in different cell rows in the multi-bit cell. The multi-bit cell includes first to fourth cell boundaries. The first and second boundaries extend in a first direction and the third and fourth boundaries extend in a second direction different from the first direction. The first bit cell and a second bit cell of the bit cells abut the third cell boundary, and the first bit cell and a (M/2+1)-th bit cell of the bit cells abut the first cell boundary.

Abstract: A syringe apparatus is provided for stirring and delivering single or multi-component compositions. The syringe apparatus comprises a syringe barrel, a plunger, a stirring paddle, and a connecting member. The plunger partially disposed within the syringe barrel is movable along an axial direction of the syringe barrel. The stirring paddle disposed within the syringe barrel has one end passing through the plunger and slidably disposed within the plunger. The syringe apparatus of the disclosure can stir the components and deliver the mixture safely for maintaining a good hygiene condition during the therapeutic process.

Abstract: A syringe apparatus is provided for stirring and delivering single or multi-component compositions. The syringe apparatus comprises a syringe barrel, a plunger, a stirring paddle, and a connecting member. The plunger partially disposed within the syringe barrel is movable along an axial direction of the syringe barrel. The stirring paddle disposed within the syringe barrel has one end passing through the plunger and slidably disposed within the plunger. The syringe apparatus of the disclosure can stir the components and deliver the mixture safely for maintaining a good hygiene condition during the therapeutic process.