Patents by Inventor Li-Ming Chang

Li-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162455
    Abstract: A battery cell including a membrane electrode assembly, a cathode bipolar plate and an anode bipolar plate. The anode bipolar plate includes a metal layer and a thermally conductive layer. The metal layer is stacked on a side of the membrane electrode assembly that is located farthest away from the cathode bipolar plate. The metal layer has a bottom surface, a top surface, a first side surface and a second side surface. The bottom surface faces the membrane electrode assembly. The thermally conductive layer includes a first cover layer and two second cover layers. The first cover layer covers the top surface of the metal layer. The two second cover layers protrude from two opposite sides of the first cover layer, respectively. The two second cover layers at least partially cover the first side surface and the second side surface of the metal layer, respectively.
    Type: Application
    Filed: March 16, 2023
    Publication date: May 16, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Ming LAI, Sung-Chun CHANG, Chiu-Ping HUANG, Li-Duan TSAI
  • Patent number: 11978929
    Abstract: A close-end fuel cell and an anode bipolar plate thereof are provided. The anode bipolar plate includes an airtight conductive frame and a conductive porous substrate disposed within the airtight conductive frame. In the airtight conductive frame, an edge of a first side has a fuel inlet, and an edge of a second side has a fuel outlet. The conductive porous substrate has at least one flow channel, where a first end of the flow channel communicates with the fuel inlet, a second end of the flow channel communicates with the fuel outlet. The flow channel is provided with a blocking part near the fuel inlet to divide the flow channel into two areas.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: May 7, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Sung-Chun Chang, Chien-Ming Lai, Chiu-Ping Huang, Li-Duan Tsai, Keng-Yang Chen
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Publication number: 20240086612
    Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Po-Hsiang HUANG, Fong-Yuan CHANG, Clement Hsingjen WANN, Chih-Hsin KO, Sheng-Hsiung CHEN, Li-Chun TIEN, Chia-Ming HSU
  • Patent number: 11916133
    Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a gate structure sandwiched between and in contact with a first spacer feature and a second spacer feature, a top surface of the first spacer feature and a top surface of the second spacer feature extending above a top surface of the gate structure, a gate self-aligned contact (SAC) dielectric feature over the first spacer feature and the second spacer feature, a contact etch stop layer (CESL) over the gate SAC dielectric feature, a dielectric layer over the CESL, a gate contact feature extending through the dielectric layer, the CESL, the gate SAC dielectric feature, and between the first spacer feature and the second spacer feature to be in contact with the gate structure, and a liner disposed between the first spacer feature and the gate contact feature.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Zhen Yu, Lin-Yu Huang, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20230361248
    Abstract: A light-emitting device, includes a semiconductor stack, including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a first electrode formed on the first semiconductor layer, comprising a first pad electrode; a second electrode formed on the second semiconductor layer, comprising a second pad electrode and a second finger electrode extending from the second pad electrode; a second current blocking region formed under the second electrode, comprising a second core region under the second pad electrode and an extending region under the second finger electrode; and a transparent conductive layer, formed on the second semiconductor layer and covering the second core region; wherein in a top view, a contour of the second pad electrode has a circular shape and a contour of the second core region has a shape which is different from the circular shape and selected from square, rectangle, rounded rectangle, rhombus, trapezoid and polygon.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 9, 2023
    Inventors: Hsin-Ying WANG, Hui-Chun YEH, Li-Ming CHANG, Chien-Fu SHEN, Chen OU
  • Patent number: 11705539
    Abstract: An optoelectronic device includes a semiconductor stack including a top surface; a current blocking region, including a first pad portion formed on the semiconductor stack and wherein the current blocking region includes transparent insulated material; a first opening, formed in the first pad portion, exposing the top surface of the semiconductor stack; a transparent conductive layer, covering the top surface of the semiconductor stack, including a second opening overlapping the first opening; and a first electrode, formed on the semiconductor stack, including a first pad electrode formed on the first pad portion of the current blocking region; wherein the first pad electrode contacts the semiconductor stack through the first opening and the second opening; wherein the first opening includes a first area, the first pad portion and the first opening compose a total area, and a ratio of the first area to the total area is between 10% and 40%.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: July 18, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Tzung-Shiun Yeh, Li-Ming Chang, Chien-Fu Shen
  • Patent number: 11430934
    Abstract: A light-emitting device includes: a substrate, including a first edge, a second edge, a third edge and a fourth edge; a semiconductor stack formed on the substrate, comprising a first semiconductor layer, a second semiconductor layer and an active layer; a first electrode formed on the first semiconductor layer, comprising a first pad electrode; and a second electrode formed on the second semiconductor layer, comprising a second pad electrode and a second finger electrode; wherein in a top view, the first pad electrode is adjacent to a corner of the substrate that is intersected by the first and the second edges; the second finger electrode is not parallel with the third and the first edges; and a distance between the second finger electrode and the first edge increases along a direction from an end of the second finger electrode that connects the second pad electrode toward the second edge.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: August 30, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Li-Ming Chang, Tzung-Shiun Yeh, Chien-Fu Shen, Yu-Rui Lin, Chen Ou, Hsin-Ying Wang, Hui-Chun Yeh
  • Publication number: 20220173272
    Abstract: A light-emitting package, includes: a housing including an opening; a lead frame covered by the housing; a light-emitting device, mounted in the opening and electrically connected to the lead frame, the light-emitting device including: a substrate including: a base with a main surface; and a plurality of protrusions on the main surface, wherein the protrusion and the base include different materials; a semiconductor stack on the main surface, the semiconductor stack including a side wall, and wherein an included angle between the side wall and the main surface is an obtuse angle; wherein the main surface includes a peripheral area not covered by the semiconductor stack, and the peripheral area is devoid of the protrusion formed thereon; and a filling material filling in the opening and covering the light-emitting device.
    Type: Application
    Filed: February 17, 2022
    Publication date: June 2, 2022
    Inventors: Li-Ming CHANG, Tzung-Shiun YEH, Chien-Fu SHEN, Wen-Hsiang LIN, Pei-Chi CHIANG, Yi-Wen KU
  • Publication number: 20220157988
    Abstract: A power semiconductor device including an epitaxial layer and a fabrication method thereof are provided. A first well region and a second well region separated from each other respectively extend from a surface of the epitaxial layer into the epitaxial layer. A floating doped region is located in the epitaxial layer and between the first well region and the second well region. The floating doped region is separated from the first well region and the second well region. A first doped region and a second doped region respectively extend from the surface of the epitaxial layer into the first well region and the second well region. A gate structure is located on the epitaxial layer and is adjacent to the first doped region and the second doped region. The gate structure is at least partially overlapped with the floating doped region.
    Type: Application
    Filed: November 16, 2021
    Publication date: May 19, 2022
    Applicant: Invinci Semiconductor Corporation
    Inventors: Hsu-Heng Lee, Mei-Ling Chen, Li-Ming Chang
  • Publication number: 20220140073
    Abstract: A power semiconductor device includes an epitaxial layer of a first conductivity type, a first doped region of a second conductivity type, a second doped region of the first conductivity type, a contact metal layer, a device electrode, a first termination electrode, and a second termination electrode. The epitaxial layer includes an active region and a termination region. The device electrode is located in a device trench in the active region, and is electrically isolated from the epitaxial layer and the contact metal layer. The first termination electrode is located in a first termination trench in the termination region and is electrically isolated from the epitaxial layer. The second termination electrode is located at a bottom of the first termination trench and is electrically isolated from the first termination electrode and the epitaxial layer. Both the first termination electrode and the second termination electrode are capable of being selectively floating.
    Type: Application
    Filed: July 13, 2021
    Publication date: May 5, 2022
    Applicant: Invinci Semiconductor Corporation
    Inventors: Li-Ming Chang, Mei-Ling Chen, Hsu-Heng Lee
  • Patent number: 11282982
    Abstract: A light-emitting device, includes: a substrate, including a base with a main surface; and a plurality of protrusions on the main surface, wherein the protrusion and the base include different materials; and a semiconductor stack on the main surface, including a side wall, and wherein an included angle between the side wall and the main surface is an obtuse angle; wherein the main surface includes a peripheral area surrounding the semiconductor stack, and the peripheral area is devoid of the protrusion formed thereon.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: March 22, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Li-Ming Chang, Tzung-Shiun Yeh, Chien-Fu Shen, Wen-Hsiang Lin, Pei-Chi Chiang, Yi-Wen Ku
  • Publication number: 20220037556
    Abstract: A light-emitting device, including: a semiconductor stack generating a first light; and a filter formed on the stack, including a first surface facing the stack and a second surface opposite to the first surface. The filter includes pairs of layers with different refractive indexes alternately stacked, and a portion of the first light is transmitted by the filter. The light emitting device emits a second light including the portion of the first light, and the second light includes a first directional part with a first FWHM and a second directional part with a second FWHM. The first directional part has a first angle with a normal direction of the second surface in a range of 45-90 degrees, the second directional part has a second angle with the normal direction of the second surface in a range of 0-30 degrees, and the second FWHM is smaller than the first FWHM.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 3, 2022
    Inventors: Heng-Ying CHO, Li-Yu SHEN, Yu-Yi HUNG, Chen OU, Li-Ming CHANG
  • Publication number: 20210119084
    Abstract: An optoelectronic device includes a semiconductor stack; a current blocking region, including a first pad portion formed on the semiconductor stack and wherein the current blocking region includes transparent insulated material; a first opening, formed in the first pad portion, exposing a top surface of the semiconductor stack; a transparent conductive layer, covering the current blocking region and/or a surface of the semiconductor stack, including a second opening exposing the first opening; and a first electrode, formed on the semiconductor stack, including a first pad electrode formed on the first pad portion of the current blocking region; wherein the first pad electrode contacts the semiconductor stack through the first opening and the second opening; wherein the first opening includes a first area, the first pad portion and the first opening compose a total area, and a ratio of the first area to the total area is between 10% and 40%.
    Type: Application
    Filed: December 29, 2020
    Publication date: April 22, 2021
    Inventors: Tzung-Shiun YEH, Li-Ming CHANG, Chien-Fu SHEN
  • Patent number: 10910520
    Abstract: An optoelectronic device includes a semiconductor stack; a current blocking region, including a first pad portion formed on the semiconductor stack and wherein the current blocking region includes insulated material; a first opening, formed in the first pad portion, exposing a top surface of the semiconductor stack; a transparent conductive layer, formed on the current blocking region and/or the top surface of the semiconductor stack, including a second opening exposing the first opening; and a first electrode, formed on the transparent conductive layer and including a first pad electrode formed on the first pad portion of the current blocking region and electrically connecting to the semiconductor stack through the first opening; wherein in a top view, the first opening and the second opening have different shapes.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: February 2, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Tzung-Shiun Yeh, Li-Ming Chang, Chien-Fu Shen
  • Publication number: 20210020817
    Abstract: A light-emitting device includes: a substrate, including a first edge, a second edge, a third edge and a fourth edge; a semiconductor stack formed on the substrate, comprising a first semiconductor layer, a second semiconductor layer and an active layer; a first electrode formed on the first semiconductor layer, comprising a first pad electrode; and a second electrode formed on the second semiconductor layer, comprising a second pad electrode and a second finger electrode; wherein in a top view, the first pad electrode is adjacent to a corner of the substrate that is intersected by the first and the second edges; the second finger electrode is not parallel with the third and the first edges; and a distance between the second finger electrode and the first edge increases along a direction from an end of the second finger electrode that connects the second pad electrode toward the second edge.
    Type: Application
    Filed: August 5, 2020
    Publication date: January 21, 2021
    Inventors: Li-Ming CHANG, Tzung-Shiun YEH, Chien-Fu SHEN, Yu-Rui LIN, Chen OU, Hsin-Ying WANG, Hui-Chun YEH
  • Publication number: 20200303590
    Abstract: An optoelectronic device includes a semiconductor stack; a current blocking region, including a first pad portion formed above the semiconductor stack and wherein the current blocking region includes insulated material; a first opening, formed in the first pad portion, exposing a top surface of the semiconductor stack; a transparent conductive layer, formed on the current blocking region and/or the top surface of the semiconductor stack, including a second opening exposing the first opening; and a first electrode, formed on the transparent conductive layer and including a first pad electrode formed above the first pad portion of the current blocking region and electrically connecting to the semiconductor stack through the first opening; wherein in a top view, the first opening and the second opening have different shapes.
    Type: Application
    Filed: June 4, 2020
    Publication date: September 24, 2020
    Inventors: Tzung-Shiun YEH, Li-Ming CHANG, Chien-Fu SHEN
  • Patent number: 10784427
    Abstract: A light-emitting device includes a first edge to a fourth edge; a semiconductor stack formed on a substrate, including a first semiconductor layer, a second semiconductor layer and an active layer; a first electrode formed on the first semiconductor layer, including a first pad electrode and a first finger electrode; and a second electrode formed on the second semiconductor layer, including a second pad electrode and a second finger electrode; wherein the first finger electrode is disposed at and along the first edge; and the first finger electrode includes a first overlapping portion overlapping the second finger electrode; the second finger electrode includes a second overlapping portion overlapping the first finger electrode and a non-overlapping portion that does not overlap the first finger electrode; and the second overlapping portion is not parallel with the first overlapping portion and the non-overlapping portion is not parallel with the first edge.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: September 22, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Li-Ming Chang, Tzung-Shiun Yeh, Chien-Fu Shen, Yu-Rui Lin, Chen Ou, Hsin-Ying Wang, Hui-Chun Yeh
  • Patent number: D1012330
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: January 23, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chen Ou, Li-Ming Chang, Chien-Fu Shen, Hsin-Ying Wang