Patents by Inventor Li Peng

Li Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240173757
    Abstract: An apparatus for washing and decontaminating soils includes a high-pressure microbubble generation module, a coarse grain heterogeneous separation module, an ultrasonic shock module, and a fine grain heterogeneous separation module. The high-pressure microbubble generation module generates first microbubbles, and uses a first shock energy generated when the first microbubbles burst to remove an oil contaminant on coarse grain soils. The coarse grain heterogeneous separation module uses the difference in density to separate the oil contaminant and the coarse grain soils from a soil and water mixture. The ultrasonic shock module generates second microbubbles and performs an ultrasonic shock operation to increase a second shock energy generated when the second microbubbles burst to remove another oil contaminant on fine grain soils. The fine grain heterogeneous separation module uses the difference in density to separate the another oil contaminant and the fine grain soils from the soil and water mixture.
    Type: Application
    Filed: July 14, 2023
    Publication date: May 30, 2024
    Inventors: Huang-Long LIN, Li-Peng CHANG, Chien-Chang HUANG
  • Patent number: 11997613
    Abstract: A communication method includes determining, by a terminal device, first in-device coexistence (IDC) interference adjustment information, where the first IDC interference adjustment information includes frequency bandwidth information, and sending, by the terminal device, the first IDC interference adjustment information to a network device to adjust IDC interference based on the first IDC interference adjustment information.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: May 28, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Rentian Ding, Yiru Kuang, Li Shen, Bingguang Peng
  • Publication number: 20240162372
    Abstract: A light-emitting device includes a semiconductor epitaxial structure that has a first surface and a second surface opposite to the first surface, and that includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially disposed in such order in a direction from the first surface to the second surface. The active layer includes well layers and barrier layers that are alternately stacked. The active layer has an upper surface that is adjacent to the second semiconductor layer, and a lower surface that is opposite to the upper surface. The first semiconductor layer is doped with an n-type dopant, which has a first concentration of 5E17/cm3 at a first point in the first semiconductor layer. The first point of the first semiconductor layer and the lower surface of the active layer have a first distance therebetween. The first distance ranges from 150 nm to 500 nm.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 16, 2024
    Inventors: Weihuan LI, Jinghua CHEN, Huan-Shao KUO, Yu-Ren PENG, Dongpo CHEN, Chia-Hung CHANG
  • Publication number: 20240156979
    Abstract: The invention relates generally to proteins comprising a recombinant Siglec extracellular domain (ECD), or a functional fragment or variant thereof, optionally containing a mutation that reduces sialic acid binding activity and/or conjugated to a serum half-life enhancer. The invention further relates to methods of using the proteins for treating an inflammatory disorder and/or an autoimmune disorder.
    Type: Application
    Filed: April 15, 2022
    Publication date: May 16, 2024
    Inventors: Li Peng, Sujata B. Nerle, Zakir B. Siddiquee
  • Patent number: 11983560
    Abstract: Systems, apparatuses, and methods for efficient parallel execution of multiple work units in a processor by reducing a number of memory accesses are disclosed. A computing system includes a processor core with a parallel data architecture. One or more of a software application and firmware implement matrix operations and support the broadcast of shared data to multiple compute units of the processor core. The application creates thread groups by matching compute kernels of the application with data items, and grouping the resulting work units into thread groups. The application assigns the thread groups to compute units based on detecting shared data among the compute units. Rather than send multiple read access to a memory subsystem for the shared data, a single access request is generated. The single access request includes information to identify the multiple compute units for receiving the shared data when broadcasted.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: May 14, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Li Peng, Jian Yang, Chi Tang
  • Publication number: 20240154068
    Abstract: A light-emitting device includes: an epitaxial structure that has a first surface and a second surface; a first metal electrode that is disposed on the first surface, and that includes a main electrode and extending electrodes; current transmission blocks that are disposed on the second surface, and each having an electrode-facing sidewall and a non-electrode-facing sidewall; and a current blocking layer that is disposed in spaces among the current transmission blocks.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 9, 2024
    Inventors: Yuehua JIA, Weihuan LI, Huan-Shao KUO, Yu-Ren PENG, Duxiang WANG
  • Publication number: 20240145632
    Abstract: A micro light emitting device includes an epitaxial structure, a conductive layer, and a first insulating layer. The epitaxial structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, an active layer and a second semiconductor layer that are arranged in such order in a direction from the first surface to the second surface. The conductive layer is formed on a surface of the first semiconductor layer away from the active layer. The first insulating layer is formed on the surface of the first semiconductor layer away from the active layer, and exposes at least a part of the conductive layer.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: Ming-Chun TSENG, Shaohua HUANG, Hongwei WANG, Kang-Wei PENG, Su-Hui LIN, Xiaomeng LI, Chi-Ming TSAI, Chung-Ying CHANG
  • Patent number: 11972974
    Abstract: An IC structure includes a transistor, a source/drain contact, a metal oxide layer, a non-metal oxide layer, a barrier structure, and a via. The transistor includes a gate structure and source/drain regions on opposite sides of the gate structure. The source/drain contact is over one of the source/drain regions. The metal oxide layer is over the source/drain contact. The non-metal oxide layer is over the metal oxide layer. The barrier structure is over the source/drain contact. The barrier structure forms a first interface with the metal oxide layer and a second interface with the non-metal oxide layer, and the second interface is laterally offset from the first interface. The via extends through the non-metal oxide layer to the barrier structure.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu, Mrunal Abhijith Khaderbad, Keng-Chu Lin
  • Publication number: 20240136471
    Abstract: A light-emitting device includes an epitaxial structure having a first surface and a second surface that is opposite to the first surface. The epitaxial structure includes, along a first direction from the first surface to the surface, a first-type semiconductor layer, an active layer, and a second-type semiconductor layer including a capping layer. The capping layer includes at least Ni number of sub-layers arranged in the first direction, where N1?2. Each of the sub-layers of the capping layer contains a material represented by Aly1Ga1-y1InP, where 0<y1?1. The capping layer has an Al content which increases and then remains constant along the first direction. A light-emitting apparatus includes the light-emitting device is also provided.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 25, 2024
    Inventors: Weihuan LI, JInghua CHEN, Yu-Ren PENG, Huan-Shao KUO, Chia-Hung CHANG
  • Patent number: 11965188
    Abstract: The invention relates generally to recombinant human sialidases and recombinant sialidase fusion proteins, wherein the sialidase optionally contains one or more mutations compared to wild-type human sialidase, e.g., a substitution, deletion, or addition of at least one amino acid. The invention also provides antibody conjugates including a sialidase and an antibody or a portion thereof. The invention further relates to methods of using the sialidase fusion proteins or antibody conjugates for treating cancer.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: April 23, 2024
    Assignee: Palleon Pharmaceuticals Inc.
    Inventors: Li Peng, Lizhi Cao, Lihui Xu
  • Patent number: 11957035
    Abstract: The present application provides a mask assembly and a display device. The display device comprises a display area and at least one non-display area, the display area surrounding the non-display area; the display device further comprises a transitional-display area adjoining the non-display area as well as the display area, respectively, wherein both the display area and the transitional-display area are used to display static or dynamic images; a thickness of a first electrode in the transitional-display area is smaller than or equal to a thickness of the first electrode in the display area. The presence of the transitional-display area prevents incomplete display caused by incomplete coverage of the evaporation material in the display device, such as black-edged display formed in an area where a connection bridge is located, thereby improving the display integrity.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 9, 2024
    Assignee: KUNSHAN GO-VISIONOX OPTO-ELECTRONICS CO., LTD.
    Inventors: Chao Chi Peng, Mingxing Liu, Shuaiyan Gan, Zhiyuan Zhang, Weili Li
  • Publication number: 20240103097
    Abstract: The present disclosure provides a direct current (DC) transformer error detection apparatus for a pulsating harmonic signal, including a DC and pulsating harmonic current output module and an external detected input module, where the DC and pulsating harmonic current output module outputs a DC and a DC superimposed pulsating harmonic current to an internal sampling circuit and a self-calibrated standard resistor array; and the internal sampling circuit converts the input DC and the input DC superimposed pulsating harmonic current into a voltage signal, and sends the voltage signal to an analog-to-digital (AD) sampling and measurement component through a front-end conditioning circuit and a detected input channel. The DC transformer error detection apparatus can complete self-calibration for measurement of the DC and the pulsating harmonic signal on a test site.
    Type: Application
    Filed: August 17, 2022
    Publication date: March 28, 2024
    Inventors: Xin Zheng, Wenjing Yu, Tao Peng, Yi Fang, Ming Lei, Hong Shi, Ben Ma, Li Ding, Wei Wei, Linghua Li, He Yu, Tian Xia, Yingchun Wang, Sike Wang, Dongri Xie, Xin Wang, Bo Pang, Xianjin Rong
  • Publication number: 20240104288
    Abstract: A system for manufacturing an integrated circuit includes a processor coupled to a non-transitory computer readable medium configured to store executable instructions. The processor is configured to execute the instructions for generating a layout design of the integrated circuit that has a set of design rules. The generating of the layout design includes generating a set of gate layout patterns corresponding to fabricating a set of gate structures of the integrated circuit, generating a cut feature layout pattern corresponding to a cut region of a first gate of the set of gate structures of the integrated circuit, generating a first conductive feature layout pattern corresponding to fabricating a first conductive structure of the integrated circuit, and generating a first via layout pattern corresponding to a first via. The cut feature layout pattern overlaps a first gate layout pattern of the set of gate layout patterns.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Inventors: Shih-Wei PENG, Chih-Liang CHEN, Charles Chew-Yuen YOUNG, Hui-Zhong ZHUANG, Jiann-Tyng TZENG, Shun Li CHEN, Wei-Cheng LIN
  • Publication number: 20240101320
    Abstract: Provided is an automatic air-release box lid, including: a box lid body provided with an air hole, the air hole being configured as a through-hole structure, openings at two ends of the air hole being located on an upper surface and a lower surface of the box lid body respectively; and a fastening lug having a rotating shaft part by which the fastening lug is hinged to the upper surface of the box lid body, the rotating shaft part and one opening of the air hole being arranged corresponding to each other and one above the other, the rotating shaft part having a blocking surface. Further provided is a preservation box, including: an automatic air-release box lid and a box body. The box lid is fitted to cover the box body.
    Type: Application
    Filed: February 23, 2023
    Publication date: March 28, 2024
    Inventors: Li Lixin, Zhou Yongning, Zheng Peng, Wang Lu
  • Patent number: 11941318
    Abstract: The present application provides an audio and video playing system, a playing method and a playing device. The system comprises: a display device; a directional sound output module configured to output a directional sound signal; a tracking element configured to monitor a target visual area and to monitor the target display area on the display screen; and a processor, connected with the directional sound output module and the tracking element respectively, and configured to acquire a first audio and video data to be output in the target display area, display image information of the first audio and video data in the target display area, and output sound information of the first audio and video data to the directional sound output module such that the directional sound output module output a directional sound signal towards the target visual area.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: March 26, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xiaomang Zhang, Xiangjun Peng, Tiankuo Shi, Chenxi Zhao, Shuo Zhang, Yifan Hou, Yan Sun, Li Tian, Jing Liu, Wei Sun, Zhihua Ji, Yanhui Xi
  • Publication number: 20240096867
    Abstract: A semiconductor structure is provided and includes a first gate structure, a second gate structure, and at least one local interconnect that extend continuously across a non-active region from a first active region to a second active region. The semiconductor structure further includes a first separation spacer disposed on the first gate structure and first vias on the first gate structure. The first vias are arranged on opposite sides of the first separation spacer are isolated from each other and apart from the first separation spacer by different distances.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Charles Chew-Yuen YOUNG, Chih-Liang CHEN, Chih-Ming LAI, Jiann-Tyng TZENG, Shun-Li CHEN, Kam-Tou SIO, Shih-Wei PENG, Chun-Kuang CHEN, Ru-Gun LIU
  • Publication number: 20240096927
    Abstract: The present invention provides a silicon capacitor structure, including a substrate, an interlayer dielectric (ILD) layer on the substrate, a capacitor recess extending from a surface of the ILD layer into the substrate, a capacitor in the capacitor recess, wherein the capacitor includes a bottom electrode on a surface of the capacitor recess, a capacitive dielectric layer on a surface of the bottom electrode, and a top electrode on a surface of the capacitive dielectric layer and filling up the capacitor recess.
    Type: Application
    Filed: March 2, 2023
    Publication date: March 21, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Li-Peng Chang, Chih-Ling Hung, San-Jung Chang
  • Publication number: 20240085579
    Abstract: A tuning method for a collimator of a CT machine, which, in each cycle of X-ray scan operation and stop, may include determining whether an X-ray is generated from the anode plate; calculating the Z-direction heating displacement of the slot plate during the current scan based on a detected X-ray, driving the slot plate to move by the heating displacement in the Z-direction, calculating the total Z-direction heating displacement of the slot plate at the end of the current scan, calculating the cooling displacement of the slot plate during the current stop based on the stop time of the X-ray, and driving the slot plate to move.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Applicant: Siemens Healthcare GmbH
    Inventors: Jia Peng Zhu, Li Dong Zhang, Jian Zhang, Ji Feng Zhao, Feng Hai Yu
  • Publication number: 20240088267
    Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yi PENG, Chih Chieh YEH, Chih-Sheng CHANG, Hung-Li CHIANG, Hung-Ming CHEN, Yee-Chia YEO
  • Patent number: D1019308
    Type: Grant
    Filed: September 6, 2021
    Date of Patent: March 26, 2024
    Inventor: Li Peng