Patents by Inventor Lian Sung

Lian Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Instruction length determination device and method using concatenate bits to determine an instruction length in a multi-mode processor
    Patent number: 7895414
    Abstract: An instruction length determination device includes an instruction input unit having a memory space to store a plurality of N-bit data; an instruction fetch unit which fetches the plurality of N-bit data from the instruction input unit; an instruction length determination logic which compares concatenate bits of a first N-bit data with a predetermined value for determination of an instruction length; and an instruction concatenate unit which selectively concatenates a number of successive N-bit data based on the determination. The instruction length determination logic determines that the first N-bit data is a complete instruction when the concatenate bit of the first N-bit data is not equal to the predetermined value. Otherwise, the instruction length determination logic determines that a complete instruction is formed of last N-bit data finally fetched and all N-bit previously reserved.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: February 22, 2011
    Assignee: Sunplus Technology Co., Ltd.
    Inventor: Lian Sung
  • Instruction length determination device and method using concatenate bits to determine an instruction length in a multi-mode processor
    Publication number: 20090055629
    Abstract: An instruction length determination device includes an instruction input unit having a memory space to store a plurality of N-bit data; an instruction fetch unit which fetches the plurality of N-bit data from the instruction input unit; an instruction length determination logic which compares concatenate bits of a first N-bit data with a predetermined value for determination of an instruction length; and an instruction concatenate unit which selectively concatenates a number of successive N-bit data based on the determination. The instruction length determination logic determines that the first N-bit data is a complete instruction when the concatenate bit of the first N-bit data is not equal to the predetermined value. Otherwise, the instruction length determination logic determines that a complete instruction is formed of last N-bit data finally fetched and all N-bit previously reserved.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 26, 2009
    Applicant: Sunplus Technology Co., Ltd.
    Inventor: Lian Sung