Patents by Inventor Liang-Chung Wu
Liang-Chung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11996283Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.Type: GrantFiled: July 26, 2022Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shich-Chang Suen, Li-Chieh Wu, Chi-Jen Liu, He Hui Peng, Liang-Guang Chen, Yung-Chung Chen
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Publication number: 20070126376Abstract: An LED driving circuit includes an LED, a current source, a comparator and a voltage converter. A first end of the current source is coupled to a first end of the LED. The comparator includes a first input end coupled to a reference voltage and a second input end coupled to the first end of the current source. The comparator generates a control voltage at an output end based on voltage levels of the first end of the current source and the reference voltage. The voltage converter includes a first input end coupled to an input voltage, a control end coupled to the output end of the comparator, and an output end coupled to a second end of the LED. The voltage converter generates an adaptive regulated voltage by comparing the voltage level of the first end of the current source with the reference voltage.Type: ApplicationFiled: November 30, 2006Publication date: June 7, 2007Inventor: Liang-Chung Wu
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Patent number: 7041527Abstract: An image sensor chip is mounted on a printed wiring frame over a substrate, which is plated with a spider web of plated conductors connecting the chip through plated through conduit which wraps around the edge of the substrate to form pads at the bottom of the substrate as output terminals for connection to a printed circuit board. After wiring bonding the chip to the plated conductor, the package is sealed. The structure is amenable to mass production. A large number of printed wiring frames are arranged as a matrix on a common substrate The frames are sealed column by column or sealed all at once. After sealing, the common substrate are diced into individual packages. The image sensor package may mounted with integrated circuit chips as peripheral circuits. The image sensor chips may be sealed with transparent glue and the integrated circuit chip may be sealed with opaque glue.Type: GrantFiled: August 17, 2004Date of Patent: May 9, 2006Assignee: Harvatek Corp.Inventor: Liang-Chung Wu
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Publication number: 20050019985Abstract: An image sensor chip is mounted on a printed wiring frame over a substrate, which is plated with a spider web of plated conductors connecting the chip through plated through conduit which wraps around the edge of the substrate to form pads at the bottom of the substrate as output terminals for connection to a printed circuit board. After wiring bonding the chip to the plated conductor, the package is sealed. The structure is amenable to mass production. A large number of printed wiring frames are arranged as a matrix on a common substrate The frames are sealed column by column or sealed all at once. After sealing, the common substrate are diced into individual packages. The image sensor package may mounted with integrated circuit chips as peripheral circuits. The image sensor chips may be sealed with transparent glue and the integrated circuit chip may be sealed with opaque glue.Type: ApplicationFiled: August 17, 2004Publication date: January 27, 2005Inventor: Liang-Chung Wu
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Patent number: 5811799Abstract: An image sensor chip is mounted on a printed wiring frame over a substrate, which is plated with a spider web of plated conductors connecting the IC through via holes to the bottom of the substrate as output terminals. After wiring bonding the IC to the plated conductor, the package is sealed. A wall is erected around the image sensor chip and is covered with a transparent glass. A lens may be placed in the middle of the cover for focusing. The structure is amenable to mass production. A large number of printed wiring frames are arranged as a matrix on a common substrate. The frames are sealed column by column or sealed all at once. After sealing, the common substrate are diced into individual packages. The image sensor package may mounted with integrated circuit chips as peripheral circuits. The image sensor chips may be sealed with transparent glue and the integrated circuit chip may be sealed with opaque glue.Type: GrantFiled: July 31, 1997Date of Patent: September 22, 1998Inventor: Liang-Chung Wu
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Patent number: 5792374Abstract: A method of fabricating a color image sensor includes the steps of: (a) providing a gray scale image sensor with an array of photoelectric converting cells and a plurality of bonding pads on a substrate; (b) applying a first transparent layer on surface of the gray scale image sensor; (c) successively forming first, second and third color filter patterns on the first transparent layer, the first color filter pattern being disposed directly above a first group of the photoelectric converting cells, the second color filter pattern being disposed directly above a second group of the photoelectric converting cells, the third color filter pattern being disposed directly above a third group of the photoelectric converting cells; (d) coating a second transparent layer on the color filter patterns and on portions of the first transparent layer not covered by the color filter patterns; (e) depositing a metal layer on the second transparent layer; (f) patterning and etching the metal layer so as to remove portions of tType: GrantFiled: May 15, 1996Date of Patent: August 11, 1998Assignee: Hualon Microelectronics CorporationInventors: Thomas Yang, Liang-Chung Wu, Shang-Tarng Jan
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Patent number: 5387829Abstract: A signal processing circuit is to be connected to an output stage of a charge-coupled device which includes a reference signal circuit and a CCD signal circuit that generate first and second output signals, respectively. The signal processing circuit includes a differential circuit and first and second amplifiers. The differential circuit receives the first and second output signals from the output stage of the charge-coupled device and generates a first signal corresponding to the first output signal and a second signal corresponding to the second output signal. The first amplifier has an output, a first input which receives the first signal from the differential circuit, and a second input which is connected to the output to serve as a negative feedback input thereto. The second amplifier has an output, a first input which receives the second signal from the differential circuit, and a second input which is connected to the output of the first amplifier to serve as a negative feedback input thereto.Type: GrantFiled: December 21, 1993Date of Patent: February 7, 1995Assignee: Hualon Microelectronics CorporationInventors: Liang-Chung Wu, Chern-Chian Cheng
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Patent number: 5237190Abstract: A charge-coupled-device image sensor includes first, second and third linear array imagers, first, second and third horizontal charge-coupled-devices, first, second and third transfer gates and first and second vertically arranged charge-coupled-devices. The first transfer gate is operated so as to transfer electrons from the first linear array imager to the first horizontal charge-coupled-device. The third transfer gate, the first and second vertically arranged charge-coupled-devices and the second horizontal charge-coupled-device are operated so as to transfer electrons from the third linear array imager to the third horizontal charge-coupled-device. The second and third transfer gates and the first vertically arranged charge-coupled-device are operated after electrons from the third linear array imager have been transferred to the third horizontal charge-coupled-device so as to transfer electrons from the second linear array imager to the second horizontal charge-coupled-device.Type: GrantFiled: July 31, 1992Date of Patent: August 17, 1993Assignee: Hualon Microelectronics CorporationInventors: Liang-Chung Wu, Clarence Choi