Patents by Inventor Liang Leon Zhang

Liang Leon Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system using driver equalization in transmission line channels with power or ground terminations
    Patent number: 9935795
    Abstract: A driver circuit device using driver equalization in power and ground terminated transmission line channels. The driver circuit device can include a weaker pull-up driver, which is needed to pre-emphasize the pull-up signal for driver equalization in power terminated transmission line channels. The driver circuit device can also include a weaker pull-down driver, which is needed to pre-emphasize the pull-down signal for driver equalization in ground terminated transmission line channels. In the transmission line channels with power terminations, a weaker pull-up Ron is implemented. In the transmission line channels with ground terminations, a weaker pull-down Ron is implemented. Drivers implemented in power and/or ground terminated transmission line channels can be used to improve device performance, such as in signal eye opening.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: April 3, 2018
    Assignee: INPHI CORPORATION
    Inventors: Liang Leon Zhang, Friedel Gerfers, Carl Pobanz, Myoung Joon Choi, Vivek Gurumoorthy, Chienhsin Lee
  • METHOD AND SYSTEM USING DRIVER EQUALIZATION IN TRANSMISSION LINE CHANNELS WITH POWER OR GROUND TERMINATIONS
    Publication number: 20170295042
    Abstract: A driver circuit device using driver equalization in power and ground terminated transmission line channels. The driver circuit device can include a weaker pull-up driver, which is needed to pre-emphasize the pull-up signal for driver equalization in power terminated transmission line channels. The driver circuit device can also include a weaker pull-down driver, which is needed to pre-emphasize the pull-down signal for driver equalization in ground terminated transmission line channels. In the transmission line channels with power terminations, a weaker pull-up Ron is implemented. In the transmission line channels with ground terminations, a weaker pull-down Ron is implemented. Drivers implemented in power and/or ground terminated transmission line channels can be used to improve device performance, such as in signal eye opening.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 12, 2017
    Inventors: Liang Leon ZHANG, Friedel GERFERS, Carl POBANZ, Myoung Joon CHOI, Vivek GURUMOORTHY, Chienhsin LEE
  • Method and system using driver equalization in transmission line channels with power or ground terminations
    Patent number: 9722822
    Abstract: A driver circuit device using driver equalization in power and ground terminated transmission line channels. The driver circuit device can include a weaker pull-up driver, which is needed to pre-emphasize the pull-up signal for driver equalization in power terminated transmission line channels. The driver circuit device can also include a weaker pull-down driver, which is needed to pre-emphasize the pull-down signal for driver equalization in ground terminated transmission line channels. In the transmission line channels with power terminations, a weaker pull-up Ron is implemented. In the transmission line channels with ground terminations, a weaker pull-down Ron is implemented. Drivers implemented in power and/or ground terminated transmission line channels can be used to improve device performance, such as in signal eye opening.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: August 1, 2017
    Assignee: INPHI CORPORATION
    Inventors: Liang Leon Zhang, Friedel Gerfers, Carl Pobanz, Myoung Joon Choi, Vivek Gurumoorthy, Chienhsin Lee
  • AC coupled clock receiver with common-mode noise rejection
    Patent number: 8693557
    Abstract: A clock receiver includes a capacitive coupling circuit for filtering out direct-current voltages from a differential clock signal. In this way, the capacitive coupling circuit rejects common-mode noise in the differential clock signal. The clock receiver also includes a bias circuit for establishing a bias voltage in the differential clock signal and a differential amplifier for amplifying the differential clock signal. Further, the differential amplifier generate a feedback differential clock signal and provides the feedback differential clock signal to the bias circuit for further rejecting common-mode noise in the differential clock signal. The feedback differential clock signal functions as a negative feedback signal for rejecting common-mode noise in the differential clock signal and as a positive feedback signal for amplifying the differential clock signal.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: April 8, 2014
    Assignee: Integrated Device Technology inc.
    Inventors: Liang Leon Zhang, Alejandro F. Gonzalez
  • Method and apparatus for an equalized on-die termination (ODT) circuit
    Patent number: 8521119
    Abstract: A method and apparatus for an equalized On-Die Termination (ODT) circuit uses timed switching to reduce receiver power consumption.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: August 27, 2013
    Assignee: Integrated Device Technology, Inc.
    Inventors: Suresh Atluri, Liang Leon Zhang
  • Method and apparatus for a low power AC On-Die-Termination (ODT) circuit
    Patent number: 8410813
    Abstract: A method and apparatus for A Low Power AC On-Die-Termination (ODT) Circuit using active components reduces receiver power consumption.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: April 2, 2013
    Assignee: Integrated Device Technology, Inc.
    Inventors: Liang Leon Zhang, Suresh Atluri, Yue Yu, Al Xuefeng Fang
  • Method and Apparatus for An Equalized On-Die Termination (ODT) Circuit
    Publication number: 20120302194
    Abstract: A method and apparatus for an equalized On-Die Termination (ODT) circuit uses timed switching to reduce receiver power consumption.
    Type: Application
    Filed: May 24, 2011
    Publication date: November 29, 2012
    Applicant: Integrated Device Technology, Inc.
    Inventors: Suresh Atluri, Liang Leon Zhang
  • Method and Apparatus for A Low Power AC On-Die-Termination (ODT) Circuit
    Publication number: 20120299617
    Abstract: A method and apparatus for A Low Power AC On-Die-Termination (ODT) Circuit using active components reduces receiver power consumption.
    Type: Application
    Filed: May 24, 2011
    Publication date: November 29, 2012
    Applicant: Integrated Device Technology, Inc.
    Inventors: Liang Leon Zhang, Suresh Atluri, Yue Yu, Al Xuefeng Fang