Abstract: An improved discontinuous current mode (DCM) switching power converter that compensates for the effect of dead time. The dead time of the switching power converter is measured during a switching cycle and a baseline on-time for a switch of the switching power converter is determined. The dead time and baseline on-time are used in calculating the desired on-time of the switch during a subsequent switching cycle of the power converter. The desired switch on-time regulates the output voltage to a desired voltage level. The desired switch on-time also maintains the average input current to the power converter in proportion to the input voltage, thereby improving the power factor of the switching power.

Abstract: The embodiments disclosed herein describe the dynamic control of a switching power converter between different operation modes of the switching power converter. In one embodiment, the operation modes of the switching power converter include a switching mode and a linear mode. The switching power converter may be included in a LED lamp system according to one embodiment.

Abstract: A switching power converter includes a controller configured to transition from a first operating mode to a second operating mode by determining the operating conditions at the transition point between the operation modes. The controller uses a point where a switch included in the power converter would have been turned on if operating under the first operating mode as a reference point to determine when to turn on the switch under the second operating mode. Using the reference point, the switching power converter determines a control period for regulating the switching period of the switch in a second operating mode.

Abstract: A low alloy steel ingot contains from 0.15 to 0.30% of C, from 0.03 to 0.2% of Si, from 0.5 to 2.0% of Mn, from 0.1 to 1.3% of Ni, from 1.5 to 3.5% of Cr, from 0.1 to 1.0% of Mo, and more than 0.15 to 0.35% of V, and optionally Ni, with a balance being Fe and unavoidable impurities. Performing quality heat treatment including a quenching step and a tempering step to the low alloy steel ingot to obtain a material, which has a grain size number of from 3 to 7 and is free from pro-eutectoid ferrite in a metallographic structure thereof, and which has a tensile strength of from 760 to 860 MPa and a fracture appearance transition temperature of not higher than 40 ° C.

Abstract: In a switching power converter, PWM mode and PFM mode are separated into two independent control sections with the control voltage range in each control section determined independently. Each of the PWM and PFM modulation modes cannot operate continuously beyond its boundaries, thereby forming a control gap between the two control sections within which no continuous operation is allowed. In order to supply a load condition within the control gap, the power supply operates at the two boundaries of the control gap. Transition between PWM and PFM modes occurs fast, with low output voltage ripple. No limitation needs to be imposed on the control voltage range in each of the PWM and PFM control sections, because the control parameters in the PWM and PFM control sections need not be matched to one another, due to separation of the PWM and PFM modes by the control gap.

Abstract: A switching power converter detects low load conditions based on the ratio of a first peak current value for peak current switching in constant voltage regulation mode to a second peak current value for peak current switching in constant current regulation mode. The power supply load is considered to have a low load if the ratio is lower than a predetermined threshold. Once a low load condition is detected, the switching frequency of the switching power converter is reduced to a level that minimizes switching loss in the power converter. In addition, the switching power converter also adjusts the switching frequency according to the sensed input line voltage. An offset is added to the switching period to reduce the switching frequency of the switching power converter, as the input line voltage is increased.

Abstract: The invention relates to a gate driving device for Thin Film Transistor liquid crystal display comprising: a plurality of shift registers directly deposited on an array substrate, said shift registers being composed of effect transistors and a capacitor, obtaining a gate driving signal voltage by controlling an input signal. Said shift register can be realized by 5-layer mask process or 4-layer mask process, by arranging the field effect transistors on the margin part outside the active region on the substrate or at the edge of the substrate, and then directly depositing them on an array substrate. The invention obtains a gate driving signal voltage by the shift registers directly deposited on the substrate, thus overcoming the shortage of the need of driving chips and film layers in the prior art, substantially reducing the production cost for LCD.

Abstract: A computer having a BIOS recovery function includes a baseboard management controller (BMC) circuit, a main control circuit, a switching module and a BIOS chip. The switching module is connected to the BMC circuit and the main control circuit. The BIOS chip stores BIOS programs for the computer and is selectively connected to the BMC circuit and main control circuit by the switching module. When the BIOS programs are corrupted, the switching module selects the BMC circuit to communicate with the BIOS chip. New BIOS programs can be sent to the BIOS chip to update the corrupted BIOS programs.

Abstract: In a switching power converter, PWM mode and PFM mode are separated into two independent control sections with the control voltage range in each control section determined independently. Each of the PWM and PFM modulation modes cannot operate continuously beyond its boundaries, thereby forming a control gap between the two control sections within which no continuous operation is allowed. In order to supply a load condition within the control gap, the power supply operates at the two boundaries of the control gap. Transition between PWM and PFM modes occurs fast, with low output voltage ripple. No limitation needs to be imposed on the control voltage range in each of the PWM and PFM control sections, because the control parameters in the PWM and PFM control sections need not be matched to one another, due to separation of the PWM and PFM modes by the control gap.

Abstract: Adaptive multi-mode digital control schemes that improve the light-load efficiency (and thus the overall average efficiency) in switch-mode power converters without causing performance issues such as audible noises or excessive voltage ripples. Embodiments include a switch-mode power converter that reduces current in the power converter using a second pulse-width-modulation (PWM) mode before reaching switching frequencies that generate audible noises. As the load across the output of the power converter is reduced, the power converter transitions from a first PWM mode in high load conditions to a first pulse-frequency-modulation (PFM) mode, then to a second PWM mode, and finally to a second PFM mode. During the second PFM mode, the switching frequency is dropped to audible frequency levels. Current in the power converter, however, is reduced in the second PWM mode before transitioning to the second PFM mode.

Abstract: In a switching power converter, PWM mode and PFM mode are separated into two independent control sections with the control voltage range in each control section determined independently. Each of the PWM and PFM modulation modes cannot operate continuously beyond its boundaries, thereby forming a control gap between the two control sections within which no continuous operation is allowed. In order to supply a load condition within the control gap, the power supply operates at the two boundaries of the control gap. Transition between PWM and PFM modes occurs fast, with low output voltage ripple. No limitation needs to be imposed on the control voltage range in each of the PWM and PFM control sections, because the control parameters in the PWM and PFM control sections need not be matched to one another, due to separation of the PWM and PFM modes by the control gap.

Abstract: A hybrid constant current control system that uses both pulse width modulation (PWM) and pulse frequency modulation (PFM) control. When transitioning from constant voltage mode to constant current mode the present invention can continue to control using PWM. Thereafter, when the voltage has dropped, the present invention smoothly transitions to PFM mode. The point of transition is based upon the switching frequency and the lowest rated voltage of operation. The system and method avoids very short (narrow) Ton times which ensures accurate constant current (CC) control with bipolar junction transistor (BJT) devices. The present invention also avoids acoustic noise because the switching frequency is maintained at a high enough level to avoid such acoustic noise even when the energy transferred through the transformer is still substantial and the output voltage is not too low.

Abstract: A transmitter identification information (TII) signal detection circuit is suitable for an orthogonal frequency division modulation system. A TII signal detection circuit receives a TII signal and conducts a cross-correlation calculation on the TII signal and a phase reference symbol (PRS) so as to obtain a present cross-correlation result, and then, sums the cross-correlation results obtained by conducting cross-correlations on AVE_TF_NUM-1 pieces of TII signals and the PRS and the present cross-correlation result so as to obtain an accumulated cross-correlation result. After that, a plurality of indices corresponding to a plurality of maximal values in the accumulated cross-correlation result is found out according to the accumulated cross-correlation result.

Abstract: In a switching power converter, PWM mode and PFM mode are separated into two independent control sections with the control voltage range in each control section determined independently. Each of the PWM and PFM modulation modes cannot operate continuously beyond its boundaries, thereby forming a control gap between the two control sections within which no continuous operation is allowed. In order to supply a load condition within the control gap, the power supply operates at the two boundaries of the control gap. Transition between PWM and PFM modes occurs fast, with low output voltage ripple. No limitation needs to be imposed on the control voltage range in each of the PWM and PFM control sections, because the control parameters in the PWM and PFM control sections need not be matched to one another, due to separation of the PWM and PFM modes by the control gap.

Abstract: A switching power converter detects low load conditions based on the ratio of a first peak current value for peak current switching in constant voltage regulation mode to a second peak current value for peak current switching in constant current regulation mode. The power supply load is considered to have a low load if the ratio is lower than a predetermined threshold. Once a low load condition is detected, the switching frequency of the switching power converter is reduced to a level that minimizes switching loss in the power converter. In addition, the switching power converter also adjusts the switching frequency according to the sensed input line voltage. An offset is added to the switching period to reduce the switching frequency of the switching power converter, as the input line voltage is increased.

Abstract: Adaptive multi-mode digital control schemes that improve the light-load efficiency (and thus the overall average efficiency) in switch-mode power converters without causing performance issues such as audible noises or excessive voltage ripples. Embodiments include a switch-mode power converter that reduces current in the power converter using a second pulse-width-modulation (PWM) mode before reaching switching frequencies that generate audible noises. As the load across the output of the power converter is reduced, the power converter transitions from a first PWM mode in high load conditions to a first pulse-frequency-modulation (PFM) mode, then to a second PWM mode, and finally to a second PFM mode. During the second PFM mode, the switching frequency is dropped to audible frequency levels. Current in the power converter, however, is reduced in the second PWM mode before transitioning to the second PFM mode.

Abstract: A computer-implemented method to decode a digital signal includes following steps. A micro control unit (MCU) receives a digital signal. The MCU reads a low voltage period of the digital signal and stores a time duration of the low voltage period into a first register as a value TL. The MCU reads next high voltage period of the digital signal and stores a time duration of the high voltage period into a second register as a value TH. The MCU reads the value TL of the first register and the value TH of the second register, and computes a ratio TR=TH/TL. The MCU compares the ratio TR with two predetermined values M and N, if TR=M, the decoded result is a logical “1.” If TR=N, the decoded result is a logical “0.

Abstract: A transmitter controlling output power to generate a ramp and a method thereof. The transmitter comprises a baseband module, a transmitter module, and a power amplifier. The baseband module receives a power control level, determines a scaling factor according to the power control level, determines a difference between an upper power limit and lower power limit according to a position on the ramp, and calculates a control signal according to the scaling factor, the lower power limit, and the difference. The transmitter module transmits data. The power amplifier coupled to the baseband module and the transmitter module, outputs the data with the output power according the control signal.

Abstract: A computer-implemented method to decode a digital signal includes following steps. A micro control unit (MCU) receives a digital signal. The MCU reads a low voltage period of the digital signal and stores a time duration of the low voltage period into a first register as a value TL. The MCU reads next high voltage period of the digital signal and stores a time duration of the high voltage period into a second register as a value TH. The MCU reads the value TL of the first register and the value TH of the second register, and computes a ratio TR=TH/TL. The MCU compares the ratio TR with two predetermined values M and N, if TR=M, the decoded result is a logical “1.” If TR=N, the decoded result is a logical “0.

Abstract: A transmitter identification information (TII) signal detection circuit is suitable for an orthogonal frequency division modulation system. A TII signal detection circuit receives a TII signal and conducts a cross-correlation calculation on the TII signal and a phase reference symbol (PRS) so as to obtain a present cross-correlation result, and then, sums the cross-correlation results obtained by conducting cross-correlations on AVE_TF_NUM-1 pieces of TII signals and the PRS and the present cross-correlation result so as to obtain an accumulated cross-correlation result. After that, a plurality of indices corresponding to a plurality of maximal values in the accumulated cross-correlation result is found out according to the accumulated cross-correlation result.