Patents by Inventor Li Chunxu

Li Chunxu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for generating and distributing an internal clock for radio network controller
    Patent number: 7613164
    Abstract: A method for generating an internal clock in a radio network controller and a relevant transmission processing board. The transmission processing board comprises; a clock signal selector for extracting a clock signal from a synchronous/asynchronous line connected with a core network when said transmission processing board functions as a master transmission processing board, or for obtaining a clock signal from a clock bus of a sub-rack in which said transmission processing board is located when said transmission processing board functions as a slave transmission processing board; a phase-locked loop for generating a reference transmission clock based on the clock signal extracted or obtained by said clock signal selector; and a clock driver for transmitting the generated reference transmission clock to the clock bus of the sub-rackin which said transmission processing board is located when said transmission processing board functions as a master transmission processing board.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: November 3, 2009
    Assignee: Alcatel
    Inventors: Li Chunxu, Vianney Andrieu, Liu Weiwei, Marc Freynet, Li Qing, Pierre Delbreil, Alf Neustadt
  • Method and apparatus for generating and distributing an internal clock for radio network controller
    Publication number: 20050146363
    Abstract: The present invention provides a method for generating an internal clock in a radio network controller and a relevant transmission processing board. The transmission processing board comprises: a clock signal selector for extracting a clock signal from a synchronous/asynchronous line connected with a core network when said transmission processing board functions as a master transmission processing board, or for obtaining a clock signal from a clock bus of a sub-rack in which said transmission processing board is located when said transmission processing board functions as a slave transmission processing board; a phase-locked loop for generating a reference transmission clock based on the clock signal extracted or obtained by said clock signal selector; and a clock driver for transmitting the generated reference transmission clock to the clock bus of the sub-rack in which said transmission processing board is located when said transmission processing board functions as a master transmission processing board.
    Type: Application
    Filed: November 3, 2004
    Publication date: July 7, 2005
    Inventors: Li Chunxu, Vianney Andrieu, Liu Weiwei, Marc Freynet, Li Qing, Pierre Delbreil, Alf Neustadt