Abstract: The invention provides a converter and a method for suppressing loop interference of converter. The converter includes first and second switching sets connected to each other. Each switching set includes a plurality of switching devices. The plurality of second switching devices are configured to be turned on for a first time after the turn-off time of the plurality of first switching devices, such that each of the plurality of second switching devices provides a path for current within the first time to reduce a potential difference between the first end of at least one of the plurality of second switching devices and the first end of the remaining of the plurality of second switching devices.

Abstract: The disclosure discloses a method and device for monitoring partial discharge. The monitoring method including: step a, connecting a monitoring circuit in parallel to both ends of a tested product, disposing a ground wire between the monitoring circuit and ground, disposing a first sensor in the monitoring circuit, and disposing a ground wire sensor on the ground wire; step b, applying an excitation signal to the tested product, acquiring a first signal through the first sensor and acquiring a ground wire signal through the ground wire sensor within a monitoring cycle; and step c, determining whether the tested product has partial discharge through the first signal and the ground wire signal. The disclosure can avoid the partial discharge monitoring device from wrongly determining an interference signal to be a partial discharge signal, enhance anti-interference capability of the partial discharge monitoring device, and improve monitoring accuracy.

Abstract: A circuit for preventing false turn-on of a semiconductor switching device includes an active clamp circuit, a control circuit, a power amplifier circuit, and a suppression circuit. The control circuit is coupled to an input of the power amplifier circuit. An output of the power amplifier circuit is coupled to a gate of the semiconductor switching device. The active clamp circuit is configured to operate within a preset period when a voltage between the first end of the semiconductor switching device and a second end of the semiconductor switching device is greater than a preset voltage. The suppression circuit includes a controllable switch, which is configured to turn on after the operation of the active clamp circuit is completed, such that potential at the input of the power amplifier circuit is clamped to a fixed potential.

Abstract: A power converter includes a PCB having opposing first and second sides, and a plurality of first commutation units and first capacitor unit disposed on the PCB. Each first commutation unit includes a first discrete component and a second discrete component. The second end of the first discrete component is electrically coupled to the first end of the second discrete component, and the first capacitor unit is electrically coupled to the first ends of the first discrete components and the second ends of the second discrete components in the plurality of first commutation units, respectively. The first discrete components and the second discrete components in the plurality of first commutation units are arranged in a row. The first discrete component and the second discrete component in each first commutation unit form a commutation loop together with the first capacitor unit.

Abstract: An electrical conversion system includes: an inductor electrically connected to an alternating current (AC) power grid; a medium voltage direct current (MVDC) bus; a non-isolated AC/DC converter, provided with a first terminal electrically connected to the inductor and a second terminal electrically connected to the MVDC bus, wherein the non-isolated AC/DC converter is configured to output a bus voltage based on an input voltage from the AC power grid; a plurality of circuit branches connected in parallel, wherein each circuit branch is connected to the MVDC bus via a corresponding converter; and a filtering network disposed between the AC power grid and the MVDC bus and is grounded through at least one capacitor.

Abstract: The disclosure discloses a method and device for monitoring partial discharge. The monitoring method including: step a, connecting a monitoring circuit in parallel to both ends of a tested product, disposing a ground wire between the monitoring circuit and ground, disposing a first sensor in the monitoring circuit, and disposing a ground wire sensor on the ground wire; step b, applying an excitation signal to the tested product, acquiring a first signal through the first sensor and acquiring a ground wire signal through the ground wire sensor within a monitoring cycle; and step c, determining whether the tested product has partial discharge through the first signal and the ground wire signal. The disclosure can avoid the partial discharge monitoring device from wrongly determining an interference signal to be a partial discharge signal, enhance anti-interference capability of the partial discharge monitoring device, and improve monitoring accuracy.

Abstract: A cascaded conversion system and a voltage equalizing control method thereof are provided. The cascaded conversion system includes a plurality of conversion circuits connected in cascade. Each conversion circuit includes a DC-side capacitor, a switching unit and a control unit. The DC-side capacitors of the conversion circuits are electrically connected in series. In each conversion circuit, the switching unit is connected to the DC-side capacitor in parallel and includes a plurality of bridge arms. Each bridge arm includes a first switch and a second switch. The control unit controls the switches according to the voltage across the DC-side capacitor. The control unit controls the first and second switches to be turned on alternately. All the first switches are turned on and off simultaneously, and all the second switches are turned on and off simultaneously, thereby making the voltages across the DC-side capacitors of the conversion circuits equal.

Abstract: A conversion device includes: an inductor connected to the AC power grid; a first-stage converter configured to output a bus voltage based on the AC power grid; a second-stage converter configured to convert the bus voltage into an output voltage to the load; and a filtering network, wherein a first resistance-capacitance circuit is disposed between the first and third terminals of the filtering network, a second resistance-capacitance circuit is disposed between the second and third terminals of the filtering network, the first terminal of the filtering network is connected to the AC power grid, the second terminal of the filtering network is connected to the bus or the second terminal of the second-stage converter, and the third terminal of the filtering network is grounded through a first capacitor.

Abstract: A conversion device includes: an inductor electrically connected to the AC power grid; a first-stage converter configured to output a bus voltage according to the AC power grid, wherein the first-stage converter includes an N-level alternating current-direct current (AC-DC) converter, and the N-level AC-DC converter includes a plurality of switch bridge arms, wherein both an upper bridge arm and a lower bridge arm of each of the plurality of switch bridge arms of the N-level AC-DC converter include a plurality of semiconductor devices connected in series, and a rated withstand voltage Vsemi of each of the semiconductor devices is greater than or equal to (Vbus*?)/((N?1)*Nseries*?); and a second-stage converter configured to convert the bus voltage into an output voltage to supply energy to the load.

Abstract: A circuit for preventing false turn-on of a semiconductor switching device includes an active clamp circuit, a control circuit, a power amplifier circuit, and a suppression circuit. The control circuit is coupled to an input of the power amplifier circuit. An output of the power amplifier circuit is coupled to a gate of the semiconductor switching device. The active clamp circuit is configured to operate within a preset period when a voltage between the first end of the semiconductor switching device and a second end of the semiconductor switching device is greater than a preset voltage. The suppression circuit includes a controllable switch, which is configured to turn on after the operation of the active clamp circuit is completed, such that potential at the input of the power amplifier circuit is clamped to a fixed potential.

Abstract: A system for driving power devices is provided, and the system includes a heat dissipation plate, semiconductor modules, gate plates, a control board, a bridge module, and a terminal module. The semiconductor modules are disposed on the heat dissipation plate. Each gate plate is disposed on the corresponding semiconductor module and includes first driving terminal. The control board is disposed on the heat dissipation plate. The bridge module and the terminal module are electrically connected to each other, disposed on the control board, and arranged sequentially in a direction from a center to an edge of the control board. The bridge module includes a plurality of driving bridge plates, and each driving bridge plate is electrically coupled to the control board. The terminal module includes a plurality of second driving terminals, and each second driving terminal is electrically connected to the corresponding driving bridge plate and first driving terminal.

Abstract: The invention provides a converter and a method for suppressing loop interference of converter. The converter includes first and second switching sets connected to each other. Each switching set includes a plurality of switching devices. The plurality of second switching devices are configured to be turned on for a first time after the turn-off time of the plurality of first switching devices, such that each of the plurality of second switching devices provides a path for current within the first time to reduce a potential difference between the first end of at least one of the plurality of second switching devices and the first end of the remaining of the plurality of second switching devices.

Abstract: The present disclosure mainly provides a clamping circuit, coupled to a first end and a second end of a switching transistor through a first node and a second node, comprising: an RCD circuit, comprising a first resistor and a first capacitor connected in parallel between the second node and a third node, and a diode having a negative electrode coupled to the third node; and a first stabilivolt diode, having a negative electrode coupled to the first node and a positive electrode coupled to a positive electrode of the diode at a fourth node.

Abstract: A cascaded conversion system and a voltage equalizing control method thereof are provided. The cascaded conversion system includes a plurality of conversion circuits connected in cascade. Each conversion circuit includes a DC-side capacitor, a switching unit and a control unit. The DC-side capacitors of the conversion circuits are electrically connected in series. In each conversion circuit, the switching unit is connected to the DC-side capacitor in parallel and includes a plurality of bridge arms. Each bridge arm includes a first switch and a second switch. The control unit controls the switches according to the voltage across the DC-side capacitor. The control unit controls the first and second switches to be turned on alternately. All the first switches are turned on and off simultaneously, and all the second switches are turned on and off simultaneously, thereby making the voltages across the DC-side capacitors of the conversion circuits equal.

Abstract: A conversion device comprises: an inductor electrically connected to the AC power grid; a first-stage converter configured to output a bus voltage according to the AC power grid, wherein the first-stage converter comprises an N-level alternating current-direct current (AC-DC) converter, and the N-level AC-DC converter comprises a plurality of switch bridge arms, wherein both an upper bridge arm and a lower bridge arm of each of the plurality of switch bridge arms of the N-level AC-DC converter include a plurality of semiconductor devices connected in series, and a rated withstand voltage Vsemi of each of the semiconductor devices is greater than or equal to (Vbus*?)/((N?1)*Nseries*?); and a second-stage converter configured to convert the bus voltage into an output voltage to supply energy to the load.

Abstract: A conversion device includes: an inductor connected to the AC power grid; a first-stage converter configured to output a bus voltage based on the AC power grid; a second-stage converter configured to convert the bus voltage into an output voltage to the load; and a filtering network, wherein a first resistance-capacitance circuit is disposed between the first and third terminals of the filtering network, a second resistance-capacitance circuit is disposed between the second and third terminals of the filtering network, the first terminal of the filtering network is connected to the AC power grid, the second terminal of the filtering network is connected to the bus or the second terminal of the second-stage converter, and the third terminal of the filtering network is grounded through a first capacitor.

Abstract: Disclosed is a surge control circuit, including: an absorption circuit including an absorption element and a bypass switch which are connected in series, a switch group connected in parallel to both ends of the absorption circuit and a first control circuit electrically connected to the switch group and bypass switch respectively. Normally, the first control circuit controls the switch group and the bypass switch to turn on simultaneously, makes the current flow through the switch group; when detecting the current is greater than or equal to the first preset current value, or the current increase rate is greater than or equal to the preset current rate of change, the first control circuit controls the switch group to turn off, makes the current flow through the absorption circuit; when detecting the current is less than the second preset current value, the first control circuit controls the bypass switch to turn off.

Abstract: Disclosed is a circuit breaker apparatus, including a first switching assembly, a first controller, a second switching assembly and a second controller. The first switching assembly is connected in series between a positive pole of a power supply and a load. The first switching assembly includes multiple first switching units in series. The first controller is electrically connected to a first pre-set reference potential of the first switching assembly. The first controller is electromagnetically coupled with each first switching unit through a first transformer unit. The second switching assembly is connected in series between a negative pole of the power supply and the load. The second switching assembly includes multiple second switching units in series. The second controller is electrically connected to a second pre-set reference potential of the second switching assembly. The second controller is electromagnetically coupled with each second switching unit through a second transformer unit.

Abstract: The present disclosure mainly provides a clamping circuit, coupled to a first end and a second end of a switching transistor through a first node and a second node, comprising: an RCD circuit, comprising a first resistor and a first capacitor connected in parallel between the second node and a third node, and a diode having a negative electrode coupled to the third node; and a first stabilivolt diode, having a negative electrode coupled to the first node and a positive electrode coupled to a positive electrode of the diode at a fourth node.

Abstract: The present disclosure discloses a method of discharging a bus capacitor in a power converter, the method comprising: outputting a plurality of pulse control signals to the corresponding plurality of power semiconductor switch groups when the working state of the power converter is in a discharge state and the state of the main circuit breaker is open to control the ON and OFF of the plurality of power semiconductor switch groups, respectively, so as to form a discharge loop between the positive terminal and the negative terminal of the bus capacitor within at least a preset time, thereby causing the bus capacitor to discharge. Since a discharge loop is formed by the bus capacitor and the bridge arms and the energy of the bus capacitor is consumed by a power device, thereby the peak value and discharge rate of discharge current can be effectively controlled without adding additional discharge elements.