Abstract: A joint acceleration planning method, a redundant robot using the same, and a computer readable storage medium are provided.

Abstract: A dynamic footprint set generation method, a biped robot using die same, and a computer readable storage medium are provided. The method includes: obtaining preset footprint calculation parameters; calculating a landing point position based on the preset footprint calculation parameters; determining a landing point range based on a landing point position, and performing a collision detection on the landing point range; recording the corresponding landing point position in a footprint set in response to the detection result representing there being no collision; obtaining a preset adjustment amplitude to update a preset displacement angle after the recording is completed; and returning to the calculating the landing point position until the footprint set is generated.

Abstract: A method for predicting a CO2 storage risk assessment includes determining a set of well integrity rules and determining a classification process based on the set of well integrity risks. Data relevant to the set of well integrity rules is extracted from data for a well located in a subsurface formation. The extracted data is provided to the classification process. A prediction for a subsurface CO2 storage tisk assessment is computed for the well. In a preferred embodiment, subsurface CO2 storage risk assessment for two or more wells in the subsurface formation are used to compute a prediction of a formation CO2 storage risk assessment.

Abstract: A robot control method includes: acquiring distances between a center of mass (COM) of the biped robot and each of preset key points of feet of the biped robot, and acquiring an initial position of the COM of the biped robot; calculating a position offset of the COM based on the distances; adjusting the initial position of the COM based on the position offset of the COM to obtain a desired position of the COM of the biped robot; and determining desired walking parameters of the biped robot based on the desired position of the COM by using a preset inverse kinematics algorithm, wherein the desired walking parameters are configured to control the biped robot to walk.

Abstract: A gait planning method and a robot using the same as well as a computer readable storage medium are provided. The method includes: determining a reference leg length l0 and a leg length variation range A of a robot; performing a trajectory planning on a length of at least one of the legs of the robot using; an equation including the reference leg length, the leg length variation range, and a preset recurrent excitation function of a time variable t. In this manner, the trajectory planning for the leg length of the robot during motion is performed according to the characteristics of motion scene such as robot jumping or running so that the change of the leg length of the robot is adapted to the motion process, which greatly improves the stability of the robot in the motion scene such as jumping or running.

Abstract: A one-way self-locking actuator, including: a housing, a one-way self-locking device, and a motor shaft at least one end of which extends out of the housing; the one-way self-locking device includes a pin rod, and a friction cap which is disposed outside the housing and sleeved over the motor shaft; an arc-shaped groove extending helically about an axial direction of the motor shaft is provided on a side wall of the friction cap; the pin rod rotates synchronously with the motor shaft and is sliding-fitted with the arc-shaped groove; the motor shaft brings the pin rod to rotate such that the friction cap is driven by the pin rod to move axially; the friction cap moves axially to contact the housing, whereby friction self-locking or detachment is enabled.

Abstract: An improved chip interface circuit and chip are disclosed. The circuit includes: a voltage divider circuit, including a first resistor, a second resistor and a switch; an input gate circuit, including a MOS transistor P1 and a MOS transistor N1; one end of the first resistor is connected to the input terminal, and the drains of P1 and N1 are connected to the first terminal, wherein the first terminal is used to connect the main circuit of the chip, and the switch is turned on when the input terminal receives a high-voltage input voltage. The circuit uses low-voltage transistors combined with a voltage divider circuit to realize the chip interface circuit, thereby achieving good interface speed characteristics, and avoiding the problem that the chip cannot work normally when the operating voltage is low due to the high threshold voltage of the high-voltage transistor.

Abstract: A packet backpressure detection method and apparatus are provided. The method includes: a device which having a Peripheral Component Interconnect Express (PCIe) port storing a plurality of packets for transmission in a packet queue and storing a packet that is to be transmitted next in a first buffer, where the queue comprises a plurality of packets that are to be transmitted via the PCIe port; and the queue is stored in a second buffer; recording a storage duration of each packet stored in the first buffer, and accumulating the storage duration of each packet stored in the first buffer; removing the packet from the first buffer after the packet is transmitted via the PCIe port; and generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

Abstract: The present application relates to a storage device operation control method, a storage device, and a management node. The method includes: receiving at least one request sent by at least one management node; and when one of the at least one request is a permission application request, determining, according to a current permission status, whether to assign operation permission to a management node that sends the permission application request; or when one of the at least one request is an operation request, determining, according to a current permission status, whether a management node that sends the operation request has operation permission, and performing an operation according to the operation request when the management node that sends the operation request has the operation permission. This avoids a conflict caused by simultaneously performing an operation on a storage device by multiple management nodes, and prevents successive serial operations from being interrupted.

Abstract: A packet backpressure detection method and apparatus are provided. The method includes: a device which having a Peripheral Component Interconnect Express (PCIe) port storing a plurality of packets for transmission in a packet queue and storing a packet that is to be transmitted next in a first buffer, where the queue comprises a plurality of packets that are to be transmitted via the PCIe port; and the queue is stored in a second buffer; recording a storage duration of each packet stored in the first buffer, and accumulating the storage duration of each packet stored in the first buffer; removing the packet from the first buffer after the packet is transmitted via the PCIe port; and generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

Abstract: A packet backpressure detection method and apparatus are provided. The method includes: a device which having a Peripheral Component Interconnect Express (PCIe) port storing a plurality of packets for transmission in a packet queue and storing a packet that is to be transmitted next in a first buffer, where the queue comprises a plurality of packets that are to be transmitted via the PCIe port; and the queue is stored in a second buffer; recording a storage duration of each packet stored in the first buffer, and accumulating the storage duration of each packet stored in the first buffer; removing the packet from the first buffer after the packet is transmitted via the PCIe port; and generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

Abstract: A packet backpressure detection method and apparatus are provided. The method includes: a device which having a Peripheral Component Interconnect Express (PCIe) port storing a plurality of packets for transmission in a packet queue and storing a packet that is to be transmitted next in a first buffer, where the queue comprises a plurality of packets that are to be transmitted via the PCIe port; and the queue is stored in a second buffer; recording a storage duration of each packet stored in the first buffer, and accumulating the storage duration of each packet stored in the first buffer; removing the packet from the first buffer after the packet is transmitted via the PCIe port; and generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

Abstract: A data prefetching method and a prefetching apparatus to improve system service performance, where the data prefetching method includes a first prefetching apparatus receives a data prefetching instruction from a first host. The first prefetching apparatus determines a target data block based on the data prefetching instruction, and obtains identification of a target prefetching apparatus from a second prefetching apparatus. Then the first prefetching apparatus determines a target storage location of the target data block based on the identification, and obtains the target data block based on the target storage location.

Abstract: The present application relates to a storage device operation control method, a storage device, and a management node. The method includes: receiving at least one request sent by at least one management node; and when one of the at least one request is a permission application request, determining, according to a current permission status, whether to assign operation permission to a management node that sends the permission application request; or when one of the at least one request is an operation request, determining, according to a current permission status, whether a management node that sends the operation request has operation permission, and performing an operation according to the operation request when the management node that sends the operation request has the operation permission. This avoids a conflict caused by simultaneously performing an operation on a storage device by multiple management nodes, and prevents successive serial operations from being interrupted.

Abstract: A method for accessing a device in a primary peripheral component interconnect express (PCIe) domain from a secondary PCIe domain includes determining which one or more virtual functions of the device in the primary PCIe domain are to be made available to the secondary PCIe domain. A virtual function driver is installed in the primary PCIe domain associated with the one or more virtual functions. Information corresponding to the one or more virtual functions is provided to the secondary PCIe domain. A virtual function driver associated with the one or more virtual functions is installed in the secondary PCIe domain from the information. The virtual function driver in the secondary PCIe domain has same properties as the virtual function driver in the primary PCIe domain. The device in the primary PCIe domain is accessed from the virtual function driver in the secondary PCIe domain.

Abstract: A method for accessing a device in a primary peripheral component interconnect express (PCIe) domain from a secondary PCIe domain includes determining which one or more virtual functions of the device in the primary PCIe domain are to be made available to the secondary PCIe domain. A virtual function driver is installed in the primary PCIe domain associated with the one or more virtual functions. Information corresponding to the one or more virtual functions is provided to the secondary PCIe domain. A virtual function driver associated with the one or more virtual functions is installed in the secondary PCIe domain from the information. The virtual function driver in the secondary PCIe domain has same properties as the virtual function driver in the primary PCIe domain. The device in the primary PCIe domain is accessed from the virtual function driver in the secondary PCIe domain.