Abstract: Provided is a reverse-conducting IGBT chip including a first conductive type substrate; and several first conductive type short circuit regions arranged at intervals below the substrate and adjacent to a collector region. The short circuit regions are located outside a first preset range having the center of a chip as a center, in a second preset range outside the first preset range and having the center of the chip as a center, in a third preset range outside the second preset range and having the center of the chip as a center, and in a range outside the third preset range and enclosed by a chip edge.

Abstract: An IGBT chip having a ?-shape mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a gate region and two active regions located at two sides of the gate region. The gate region includes a trench gate and a planar gate that is located on a surface of the gate region, and the planar gate is connected with the trench gate and formed a ?-shape mixed structure. In this way, the IGBT chip can have a significantly improved chip density, while retaining features of low power consumption and high current density of the trench gate and a feature of a wide safe operating area of the planar gate.

Abstract: An IGBT chip having a mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a source region (3) and a gate region. The gate region includes a planar gate region (1) and a trench gate region (2), which are respectively disposed at both sides of the source region (3). A planar gate and a trench gate are compositely disposed on the same cell (16), thereby greatly improving chip density while retaining both trench gate's features of low on-state energy loss and high current density and planar gate's feature of wide safe operating area.

Abstract: An IGBT chip having a mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a source region (3) and a gate region. The gate region includes a planar gate region (1) and a trench gate region (2), which are respectively disposed at both sides of the source region (3). A planar gate and a trench gate are compositely disposed on the same cell (16), thereby greatly improving chip density while retaining both trench gate's features of low on-state energy loss and high current density and planar gate's feature of wide safe operating area.

Abstract: An IGBT chip having a ?-shape mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a gate region and two active regions located at two sides of the gate region. The gate region includes a trench gate and a planar gate that is located on a surface of the gate region, and the planar gate is connected with the trench gate and formed a ?-shape mixed structure. In this way, the IGBT chip can have a significantly improved chip density, while retaining features of low power consumption and high current density of the trench gate and a feature of a wide safe operating area of the planar gate.

Abstract: Disclosed is a trench gate IGBT. A dummy gate is arranged between two real gates. An emitter metal is in contact with the dummy gate, so that an emitter metal contact area is not limited to an area between trenches. The emitter metal contact area includes an area where the emitter metal is in contact with the dummy gate, thereby enlarging the emitter metal contact area, and accordingly reducing a distance between each of the real gates and the dummy gate. Consequently, the distance between each of the real gates and the dummy gate is no longer affected by a minimum emitter contact area, and a turn-on voltage drop of the trench gate IGBT can be greatly reduced.