Abstract: Provided herein are unified control methods and implementations for controlling single and three-phase power converters. In an exemplary embodiment, a unified controller is provided that can be used to control a three-phase three-wire Voltage Source Inverter (VSI), a three-phase four-wire VSI, a three-phase grid-connected power converter for current shaping, and a single-phase full bridge VSI.

Abstract: A method of drilling holes comprises ductile mode drilling the holes in a component of a plasma processing apparatus with a cutting tool wherein the component is made of a nonmetallic hard and brittle material. The method comprises drilling each hole in the component by controlling a depth of cut while drilling such that a portion of the brittle material undergoes high pressure phase transformation and forms amorphous portions of the brittle material during chip formation. The amorphous portions of the brittle material are removed from each hole such that a wall of each hole formed in the component has an as drilled surface roughness (Ra) of about 0.2 to 0.8 ?m.

Abstract: A scanning method, apparatus, controller and electronic device based on an in-cell technique is provided according to the embodiments of the present invention. The scanning method includes: scanning a first region of a liquid crystal display (LCD) during a first period of a scanning cycle; scanning the full screen of a capacitive touch panel (CTP) during a second period of the scanning cycle; scanning a second region of the LCD during a third period of the scanning cycle. By scanning at least two regions of the LCD in a time-sharing manner and by scanning the CTP and the LCD alternatively, according to the embodiments of the present invention, the technical effect of scanning the LCD and the CTP uniformly can be achieved, in the case that there is not the without mutual interference between the scanning of the LCD and the scanning of the CTP.

Abstract: Methods and apparatus are provided for controlling a boost converter. In one embodiment, the method processes a command signal in a slew rate limiting circuit. The output of the slew rate limiting circuit is then processed using one or more feedback parameters from the proportional integrator to provide a processed command signal. The processed command signal is processed with a controlled signal to provide an error signal which is provided to the proportional integrator to provide a current command signal. In one embodiment, the apparatus includes an error generating circuit configured to provide a processed command signal using one or more feedback parameters from the proportional integrator, and to provide the error signal by subtracting a signal to be controlled from the processed command signal. A slew rate limiting circuit is used to receive a command signal and provide an output to the error generating circuit.

Abstract: Methods and apparatus are provided for controlling a boost converter. In one embodiment, the method includes processing an input current command through a plurality of prioritized limiting circuits to determine whether to limit the input current command and limiting the input current command to limit the boost converter when it is determined to limit the input current command. In one embodiment, the apparatus includes an energy source coupled to a boost converter that provides an output voltage responsive to a current command signal. An inverter is coupled to the boost converter to provide multiple phased currents to a multi-phase motor for a vehicle. A controller coupled to the boost converter for providing the current command signal by processing an input current command through a plurality of prioritized limiting circuits and determining whether to limit the input current command to provide the current command signal to the boost converter.

Abstract: Methods and systems are provided for control operation of a boost converter. The boost converter includes an input, an output, and a plurality of paths electrically connecting the input to the output. The boost converter also includes a plurality of switches disposed along the paths to control current flow between the input and the output. The system includes a controller. The controller receives a desired current to be supplied at the output. The controller determines which of the paths to utilize based at least in part on the desired current. The controller controls the switches based at least in part on the determination of which of the paths to utilize.

Abstract: Measured are received power of a first signal received from a first entity, and received power of a second signal received from a second entity. A gain factor (or a matrix of gain factors if multiple antennas are used) is determined using the measured received powers of the first signal and of the second signal. If transmit power from the apparatus to the second entity is considered as the benchmark, the second signal is forwarded from the apparatus to the first entity using a second signal transmit power that is determined using the gain factor. Or, if transmit power from the apparatus to the first entity is considered as the benchmark, the first signal is forwarded from the apparatus to the second entity using a first signal transmit power that is determined using the gain factor. Method, apparatus, and memory storing computer program are detailed.

Abstract: Provided herein are unified control methods and implementations for controlling single and three-phase power converters. In an exemplary embodiment, a unified controller is provided that can be used to control a three-phase three-wire Voltage Source Inverter (VSI), a three-phase four-wire VSI, a three-phase grid-connected power converter for current shaping, and a single-phase full bridge VSI.

Abstract: Provided herein is are unified control methods and implementations for controlling single and three-phase power converters. In an exemplary embodiment, a unified controller is provided that can be used to control a three-phase three-wire Voltage Source Inverter (VSI), a three-phase four-wire VSI, a three-phase grid-connected power converter for current shaping, and a single-phase full bridge VSI.

Abstract: A dual channel gas distributor can simultaneously distribute plasma species of an first process gas and a non-plasma second process gas into a process zone of a substrate processing chamber. The gas distributor has a localized plasma box with a first inlet to receive a first process gas, and opposing top and bottom plates that are capable of being electrically biased relative to one another to define a localized plasma zone in which a plasma of the first process gas can be formed. The top plate has a plurality of spaced apart gas spreading holes to spread the first process gas across the localized plasma zone, and the bottom plate has a plurality of first outlets to distribute plasma species of the plasma of the first process gas into the process zone. A plasma isolated gas feed has a second inlet to receive the second process gas and a plurality of second outlets to pass the second process gas into the process zone.

Abstract: Measured are received power of a first signal received from a first entity, and received power of a second signal received from a second entity. A gain factor (or a matrix of gain factors if multiple antennas are used) is determined using the measured received powers of the first signal and of the second signal. If transmit power from the apparatus to the second entity is considered as the benchmark, the second signal is forwarded from the apparatus to the first entity using a second signal transmit power that is determined using the gain factor. Or, if transmit power from the apparatus to the first entity is considered as the benchmark, the first signal is forwarded from the apparatus to the second entity using a first signal transmit power that is determined using the gain factor. Method, apparatus, and memory storing computer program are detailed.

Abstract: Provided herein is are unified control methods and implementations for controlling single and three-phase power converters. In an exemplary embodiment, a unified controller is provided that can be used to control a three-phase three-wire Voltage Source Inverter (VSI), a three-phase four-wire VSI, a three-phase grid-connected power converter for current shaping, and a single-phase full bridge VSI.

Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including introducing an organosilicon compound and an oxidizing gas at a first ratio of organosilicon compound to oxidizing gas into the processing chamber, generating a plasma of the oxidizing gas and the organosilicon compound to form an initiation layer on a barrier layer comprising at least silicon and carbon, introducing the organosilicon compound and the oxidizing gas at a second ratio of organosilicon compound to oxidizing gas greater than the first ratio into the processing chamber, and depositing a first dielectric layer adjacent the dielectric initiation layer.

Abstract: A method for joint scalar quantization is disclosed, characterized in that, transforming the original variables into intermediate variables according to a special transforming relationship; according to the variance of the intermediate variables, quantizing, feedbacking and transmitting the intermediate variables; when the original variables are needed, transforming the intermediate variables into the original variables according to the special transforming relationship. Two schemes about the intermediate variables quantization are also provided to adapt to the different system requirements. Further, based on the joint scalar quantization schemes said above, two methods for adaptively adjusting scalar quantization level according to the interrelation among signals are provided.

Abstract: A method of fabricating an interconnect structure comprising etching a via into an upper low K dielectric layer and into a hardened portion of a lower low K dielectric layer. The via is defined by a pattern formed in a photoresist layer. The photoresist layer is then stripped, and a trench that circumscribes the via as defined by a hard mask is etched into the upper low K dielectric layer and, simultaneously, the via that was etched into the hardened portion of the lower low K dielectric layer is further etched into the lower low K dielectric layer. The result is a low K dielectric dual damascene structure.

Abstract: Low K dielectric films exhibiting low mechanical stress may be formed utilizing various techniques in accordance with the present invention. In one embodiment, carbon-containing silicon oxide films are formed by plasma-assisted chemical vapor deposition at low temperatures (300° C. or less). In accordance with another embodiment, as-deposited carbon containing silicon oxide films incorporate a porogen whose subsequent liberation reduces film stress.

Abstract: A method of fabricating an interconnect structure comprising etching a via into an upper low K dielectric layer and into a hardened portion of a lower low K dielectric layer. The via is defined by a pattern formed in a photoresist layer. The photoresist layer is then stripped, and a trench that circumscribes the via as defined by a hard mask is etched into the upper low K dielectric layer and, simultaneously, the via that was etched into the hardened portion of the lower low K dielectric layer is further etched into the lower low K dielectric layer. The result is a low K dielectric dual damascene structure.

Abstract: A method of fabricating an interconnect structure comprising etching a via into an upper low K dielectric layer and into a hardened portion of a lower low K dielectric layer. The via is defined by a pattern formed in a photoresist layer. The photoresist layer is then stripped, and a trench that circumscribes the via as defined by a hard mask is etched into the upper low K dielectric layer and, simultaneously, the via that was etched into the hardened portion of the lower low K dielectric layer is further etched into the lower low K dielectric layer. The result is a low K dielectric dual damascene structure.

Abstract: A method is provided for processing a substrate including providing a processing gas comprising hydrogen gas and an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.

Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including introducing an organosilicon compound and an oxidizing gas at a first ratio of organosilicon compound to oxidizing gas into the processing chamber, generating a plasma of the oxidizing gas and the organosilicon compound to form an initiation layer on a barrier layer comprising at least silicon and carbon, introducing the organosilicon compound and the oxidizing gas at a second ratio of organosilicon compound to oxidizing gas greater than the first ratio into the processing chamber, and depositing a first dielectric layer adjacent the dielectric initiation layer.