Patents by Inventor Li Juan QU

Li Juan QU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9125314
    Abstract: A printed circuit board includes: an insulating substrate, and a patterned conductive layer having a signal line and fixed on the insulating substrate, where signal lines on different planes of the patterned conductive layer are electrically connected to a via hole through a pad. An inner wall of the via hole is formed of a conductive bar and an insulating bar that penetrate the via hole; the pad is at an edge of the via hole and is connected to the conductive bar; the pad has an unclosed structure. In the printed circuit board according to the present invention, the size of the pad is significantly reduced by arranging the pad at partial edge of the via hole, thereby effectively improving a layout density of the patterned conductive layer, hence reducing the size of the printed circuit board, and satisfying the market demand for smaller electronic products.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: September 1, 2015
    Assignee: CELESTICA TECHNOLOGY CONSULTANCY (SHANGHAI) CO. LTD.
    Inventor: Li Juan Qu
  • Publication number: 20130327565
    Abstract: A printed circuit board includes: an insulating substrate, and a patterned conductive layer having a signal line and fixed on the insulating substrate, where signal lines on different planes of the patterned conductive layer are electrically connected to a via hole through a pad. An inner wall of the via hole is formed of a conductive bar and an insulating bar that penetrate the via hole; the pad is at an edge of the via hole and is connected to the conductive bar; the pad has an unclosed structure. In the printed circuit board according to the present invention, the size of the pad is significantly reduced by arranging the pad at partial edge of the via hole, thereby effectively improving a layout density of the patterned conductive layer, hence reducing the size of the printed circuit board, and satisfying the market demand for smaller electronic products.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 12, 2013
    Inventor: Li Juan QU