Patents by Inventor Lin Huang
Lin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240147664Abstract: A flow guiding device in an immersion-cooled chassis of a server comprises at least one deflector located above a chip on a mainboard in the chassis, each deflector comprises a first end for mounting to the mainboard above the chip and a second end inclined away from the mainboard. The first end is immersed in coolant, the second end is higher than the first end; the deflector further comprises a hollow part including multiple through holes for interrupting upward movement vapor bubbles generated by the hot chip, which reduces probability of the vapor bubbles escaping from the coolant liquid and the chassis. A liquid-cooled chassis having the flow guiding device is also disclosed.Type: ApplicationFiled: December 30, 2022Publication date: May 2, 2024Inventors: SUNG TSANG, TSUNG-LIN LIU, YU-CHIA TING, CHENG-YI HUANG, CHIA-NAN PAI
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Publication number: 20240145520Abstract: The present disclosure provides a method for fabricating an image sensor. The method includes the following operations. A cavity is formed at a first surface of a substrate. A germanium layer is formed in the cavity. A first heavily doped region is formed in the germanium layer by an implantation operation. A second heavily doped region is formed at a position proximal to a top surface of the germanium layer, wherein the second heavily doped region is laterally surrounded by the first heavily doped region from a top view perspective. An interconnect structure is formed over the germanium layer.Type: ApplicationFiled: January 4, 2024Publication date: May 2, 2024Inventors: JHY-JYI SZE, SIN-YI JIANG, YI-SHIN CHU, YIN-KAI LIAO, HSIANG-LIN CHEN, KUAN-CHIEH HUANG, JUNG-I LIN
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Publication number: 20240147600Abstract: A new ring coupling structure for a linear accelerator includes an acceleration cavity, a coupling cavity, and a beam hole. The acceleration cavity and the coupling cavity are alternately assembled together. The beam hole penetrates through the acceleration cavity and the coupling cavity. The acceleration cavity adopts a bowl-shaped structure, a convex cone structure with a mesoporous is disposed on an inner wall of the acceleration cavity along the beam hole. Coupling holes between the acceleration cavity and the coupling cavity are designed as at least two waist-shaped holes uniformly distributed around the beam hole. The coupling cavity adopts a disc-shaped cavity structure with a thickened edge, and a nose cone is disposed in the coupling cavity and welded with cavity walls at both ends of a coupler. The left and right waveguide plates of the coupling cavity are welded together by using the nose cone.Type: ApplicationFiled: February 28, 2023Publication date: May 2, 2024Applicant: CHENGDU ELEKOM VACUUM ELECTRON TECHNOLOGY CO. LTDInventors: Lin ZHOU, Hao TAO, Jin GUO, Hong HUANG, Liang HU, Mi TANG
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Publication number: 20240145336Abstract: An interface interconnect structure is provided for efficient heat dissipation of a power electronic device. The structure includes a first low temperature solder layer and a second low temperature solder layer, a metal-foam metal composite material is placed between the first low temperature solder layer and the second low temperature solder layer. The metal-foam metal composite material has designability in structure and performance. The thermal conductivity and coefficient of thermal expansion (CTE) of the thermal interface interconnect structure can be configured according to the selected encapsulating materials for a power electronic device, thereby achieving bisynchronous improvement in the heat dissipation efficiency and the CTE matching degree between the encapsulating materials.Type: ApplicationFiled: August 29, 2023Publication date: May 2, 2024Inventors: Mingliang Huang, Lin Zhu, Jing Ren, Feifei Huang
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Publication number: 20240145470Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.Type: ApplicationFiled: January 5, 2024Publication date: May 2, 2024Inventors: Lung-Kun CHU, Mao-Lin HUANG, Chung-Wei HSU, Jia-Ni YU, Kuo-Cheng CHIANG, Kuan-Lun CHENG, Chih-Hao WANG
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Publication number: 20240145260Abstract: An airflow heating module for an equipment front-end module, including: a first perforated plate including a first plurality of holes used as airflow inlets; a second perforated plate including a second plurality of holes used as airflow outlets; a plurality of heaters provided between the first and the second perforated plates; and an active air intake device provided on the first perforated plate to accelerate airflow flowing through the first plurality of holes and past the plurality of heaters, such that the airflow carries heat generated by the heaters and passes through the second plurality of holes. Each of the heaters includes a heating tube and a fin. The fin is formed helically around the heating tube and attached thereto.Type: ApplicationFiled: December 27, 2022Publication date: May 2, 2024Inventors: Yueh-Lin CHIANG, Hsin-Jan PAI, Ying-Feng LEE, Ling-Chiao HUANG
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Publication number: 20240143651Abstract: The present disclosure relates to the field of image definition recognition, and discloses a logging image definition recognition method and device, medium and electronic equipment. The method comprises: establishing a logging image sample library comprising a plurality of logging images; acquiring actual definition information corresponding to the respective logging images; acquiring a plurality of definitions corresponding to the respective logging images; determining target weights corresponding to the respective target image definition determination algorithms according to the plurality of definitions and the actual definition information corresponding to the respective logging images; and determining a definition of a target logging image by the respective target image definition determination algorithms and the target weights corresponding to the respective target image definition determination algorithms.Type: ApplicationFiled: October 19, 2021Publication date: May 2, 2024Applicant: China Oilfield Services Ltd.Inventors: Lin Huang, Shusheng Guo, Zhenxue Hou, Chuan Fan, Danian Xu, Da Sheng, Wei Long, Guohua Zhang, Jiajie Cheng, Dong Li, Zhang Zhang, Lu Yin, Chaohua Zhang, Guibin Zhang
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Publication number: 20240143391Abstract: The present application discloses a dispatching and control cloud data processing method, device and system. The method includes the following operations: pilot node device acquires a global scheduling task, decomposes the global scheduling task to obtain scheduling tasks, issues the scheduling tasks to collaborative node device, acquires data collection ranges and data processing rules of the collaborative node devices, and delivers them to the collaborative node devices; the collaborative node devices receive and execute the scheduling tasks issued by the pilot node device; receives the data collection ranges and the data processing rules issued by the pilot node device, acquires, based on the scheduling tasks, collected data in the data collection ranges, processes the acquired collected data according to the data processing rules to obtain the processed data, uploads the processed data to the pilot node device; the pilot node device receives the processed data uploaded by the collaborative node devices.Type: ApplicationFiled: August 12, 2021Publication date: May 2, 2024Inventors: Dapeng LI, Lixin LI, Qingbo YANG, Lei TAO, Yunhao HUANG, Fangchun DI, Xuri SONG, Xiaolin QI, Nan YANG, Can CUI, Wenyue XIA, Ruili YE, Shuzhou WU, Lin XIE, Zhoujie ZHANG
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Publication number: 20240145381Abstract: In some embodiments, the present disclosure relates an integrated chip including a substrate. A conductive interconnect feature is arranged over the substrate. The conductive interconnect feature has a base feature portion with a base feature width and an upper feature portion with an upper feature width. The upper feature width is narrower than the base feature width such that the conductive interconnect feature has tapered outer feature sidewalls. An interconnect via is arranged over the conductive interconnect feature. The interconnect via has a base via portion with a base via width and an upper via portion with an upper via width. The upper via width is wider than the base via width such that the interconnect via has tapered outer via sidewalls.Type: ApplicationFiled: January 9, 2024Publication date: May 2, 2024Inventors: Shin-Yi Yang, Hsin-Yen Huang, Ming-Han Lee, Shau-Lin Shue, Yu-Chen Chan, Meng-Pei Lu
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Publication number: 20240144688Abstract: An automated checkout system accesses an image of an item inside a shopping cart and a location of the shopping cart within a store. The automated checkout system identifies a set of candidate items located within a threshold distance of the location of the shopping cart based on an item map. The item map describes a location of each item within the store and the location of each candidate item corresponds to a location of the candidate item on the item map. The automated checkout system inputs visual features of the item extracted from the image to a machine-learning model to identify the item by determining a similarity score between the item and each candidate item of the set of candidate items. After identifying the item, the automated checkout system displays a list comprising the item and additional items within the shopping cart to a user.Type: ApplicationFiled: November 30, 2022Publication date: May 2, 2024Inventors: Lin Gao, Yilin Huang, Shiyuan Yang, Xiaofei Zhou, Xiao Zhou, Qunwei Liu
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Patent number: 11973054Abstract: A method for transferring an electronic device includes steps as follows. A flexible carrier is provided and has a surface with a plurality of electronic devices disposed thereon. A target substrate is provided corresponding to the surface of the flexible carrier. A pin is provided, and a pin end thereof presses on another surface of the flexible carrier without the electronic devices disposed thereon, so that the flexible carrier is deformed, causing at least one of the electronic devices to move toward the target substrate and to be in contact with the target substrate. A beam is provided to transmit at least a portion of the pin and emitted from the pin end to melt a solder. The electronic device is fixed on the target substrate by soldering. The pin is moved to restore the flexible carrier to its original shape, allowing the electronic device fixed by soldering to separate from the carrier.Type: GrantFiled: January 18, 2022Date of Patent: April 30, 2024Assignee: Stroke Precision Advanced Engineering Co., Ltd.Inventors: Yu-Min Huang, Sheng Che Huang, Chingju Lin, Wei-Hao Wang
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Patent number: 11973010Abstract: A chip packaging method includes: providing a wafer, on which multiple bumps are formed; cutting the wafer into multiple chip units, wherein multiple vertical heat conduction elements are formed on the wafer or the chip units; disposing the chip units on a base material; and providing a package material to encapsulate lateral sides and a bottom surface of each of the chip units, to form a chip package unit, wherein the bottom surface of the chip unit faces the base material; wherein, in the chip package unit, the bumps on the chip units abut against the base material, and wherein the vertical heat conduction elements directly connect to the base material, or the base material includes multiple through-holes and the vertical heat conduction elements pass through the multiple through-holes in the base material.Type: GrantFiled: September 30, 2021Date of Patent: April 30, 2024Assignee: RICHTEK TECHNOLOGY CORPORATIONInventors: Hao-Lin Yen, Heng-Chi Huang, Yong-Zhong Hu
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Publication number: 20240136401Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.Type: ApplicationFiled: January 5, 2024Publication date: April 25, 2024Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
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Publication number: 20240135353Abstract: Disclosed herein relates to a self-checkout anti-theft vehicle system, comprising: a self-checkout vehicle having a plurality of sensors and components implemented thereon, the self-checkout vehicle being used by shoppers for storing selected merchandises in a retail environment; and a centralized computing device. The centralized computing device is configured to: obtain information related to each merchandise selected and placed into the self-checkout vehicle by a shopper by exchanging data with the plurality of sensors and components via a first communication network, identify each merchandise via a second, different communication network based at least upon the information obtained from the plurality of sensors and components, and process payment information of each merchandise.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Lin Gao, Yilin Huang, Shiyuan Yang, Ahmed Beshry
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Publication number: 20240135078Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.Type: ApplicationFiled: January 4, 2024Publication date: April 25, 2024Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
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Publication number: 20240132622Abstract: The present application relates to particular anti-PAD4 (peptidyl arginine deiminase 4) antibodies, nucleic acids encoding the antibodies, vectors and host cells comprising the nucleic acids, and methods of making and using the antibodies.Type: ApplicationFiled: July 20, 2023Publication date: April 25, 2024Applicant: Bristol-Myers Squibb CompanyInventors: Lin Hui Su, Ekaterina Deyanova, Burce Ergel Gurbuzbalaban, Mariana Nacht, Samantha Elaine Pace, Yun Wang, Qing Xiao, Ramakrishna Chandran, Shailesh Dudhgaonkar, Michael Louis Doyle, Michael Gilman, Richard Huang, Akbar Nayeem, Alok Sharma, Qihong Zhao
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Publication number: 20240136213Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Chun-Jung HUANG, Yung-Lin HSU, Kuang Huan HSU, Jeff CHEN, Steven HUANG, Yueh-Lun YANG
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Publication number: 20240136221Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip may comprise a first metal line disposed over a substrate. A via may be disposed directly over a top of the first metal line and the via may comprise a first lower surface and a second lower surface above the first lower surface. A first dielectric structure may be disposed laterally adjacent to the first metal line and may be disposed along a sidewall of the first metal line. A first protective etch-stop structure may be disposed directly over a top of the first dielectric structure and the first protective etch-stop structure may vertically separate the second lower surface of the via from the top of the first dielectric structure.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Shao-Kuan Lee, Hai-Ching Chen, Hsin-Yen Huang, Shau-Lin Shue, Cheng-Chin Lee
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Publication number: 20240136855Abstract: A wireless power transfer apparatus includes a first control system, a first energy transmission system, and a second energy transmission system. The first control system is coupled to the first energy transmission system, and inputs an energy transmission signal to the first energy transmission system. The first energy transmission system is coupled to the second energy transmission system, and inputs some of the energy transmission signals obtained from the first control system into the second energy transmission system. Both the energy transmission signal obtained by the first energy transmission signal from the first control system and an energy transmission signal obtained by the second energy transmission system from the first energy transmission system supply power to a target device.Type: ApplicationFiled: December 29, 2023Publication date: April 25, 2024Inventors: Ding Gui, Lin Hu, Deshuang Zhao, Musheng Liang, Tao Huang, Ming Zhao, Weipeng Jiang
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Publication number: 20240137221Abstract: Computer-implemented methods, non-transitory, computer-readable media, and computer-implemented systems implementing a one-touch login service are described. Information about a first IP address is obtained from a verification request sent by an application client device. A token is sent to the application client device. Information about a second IP address is obtained from a number acquisition request sent by an application server. Whether the first IP address is the same as the second IP address is determined. If the same, based on a token carried in the number acquisition request, a mobile phone number of a terminal device in which the application client device is located is obtained and the mobile phone number is sent to the application server. If not the same, sending the mobile phone number of the terminal device to the application server is refused.Type: ApplicationFiled: December 28, 2023Publication date: April 25, 2024Applicant: Alipay (Hangzhou) Information Technology Co., Ltd.Inventors: Wanqiao Zhang, Lin Huang, Juhu Nie, Yunding Jian, Wei Fu, Hongjian Cao, Yujia Liu