Patents by Inventor Lin XUE
Lin XUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240125234Abstract: The present invention relates to the technical field of mine fire prevention and extinguishing, in particular to a liquid nitrogen direct injection and low-temperature foaming intelligent filling system based on mine fire area characteristics and an application method, comprising a liquid nitrogen storage tank, a liquid nitrogen direct injection system and a low-temperature foaming system, wherein the liquid nitrogen storage tank communicates with a liquid nitrogen pressurizing device through a main pipeline; a temperature control unit is arranged on the main pipeline; and the liquid nitrogen pressurizing device is connected with the liquid nitrogen direct injection system and the low-temperature foaming system, respectively, liquid nitrogen is directly injected into a foam liquid, to prepare a low-temperature foam type fire preventing and extinguishing material by means of forced convection, membrane boiling, explosion boiling and nucleate boiling between the liquid nitrogen and water.Type: ApplicationFiled: December 7, 2023Publication date: April 18, 2024Inventors: Xiangming HU, Di XUE, Yong ZHOU, Kuibin WU, Wei WANG, Lin ZHU, Peng LI, Xiangdong YAO, Weidong WANG, Wenqi SHAO, Chuncheng CAI, Fusheng WANG, Liwen GUO
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Publication number: 20230389441Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.Type: ApplicationFiled: August 8, 2023Publication date: November 30, 2023Applicant: Applied Materials, Inc.Inventors: Minrui YU, Wenhui WANG, Jaesoo AHN, Jong Mun KIM, Sahil PATEL, Lin XUE, Chando PARK, Mahendra PAKALA, Chentsau Chris YING, Huixiong DAI, Christopher S. NGAI
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Patent number: 11818959Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for hybrid (or called integrated) spin-orbit-torque magnetic spin-transfer-torque magnetic random access memory (SOT-STT MRAM) applications. In one embodiment, the method includes one or more magnetic tunnel junction structures disposed on a substrate, the magnetic tunnel junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a spin orbit torque (SOT) layer disposed on the magnetic tunnel junction structure, and a back end structure disposed on the spin orbit torque (SOT) layer.Type: GrantFiled: July 19, 2021Date of Patent: November 14, 2023Assignee: Applied Materials, Inc.Inventors: Hsin-wei Tseng, Chando Park, Jaesoo Ahn, Lin Xue, Mahendra Pakala
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Patent number: 11723283Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.Type: GrantFiled: May 11, 2020Date of Patent: August 8, 2023Assignee: Applied Materials, Inc.Inventors: Minrui Yu, Wenhui Wang, Jaesoo Ahn, Jong Mun Kim, Sahil Patel, Lin Xue, Chando Park, Mahendra Pakala, Chentsau Chris Ying, Huixiong Dai, Christopher S. Ngai
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Patent number: 11621393Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a junction structure disposed on a substrate, the junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a dielectric capping layer disposed on the junction structure, a metal capping layer disposed on the junction structure, and a top buffer layer disposed on the metal capping layer.Type: GrantFiled: December 4, 2020Date of Patent: April 4, 2023Assignee: Applied Materials, Inc.Inventors: Lin Xue, Chando Park, Chi Hong Ching, Jaesoo Ahn, Mahendra Pakala
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Patent number: 11552244Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ seed layers of one or more layer of chromium (Cr), NiCr, NiFeCr, RuCr, IrCr, or CoCr, or combinations thereof. These seed layers are used in combination with one or more pinning layers, a first pinning layer in contact with the seed layer can contain a single layer of cobalt, or can contain cobalt in combination with bilayers of cobalt and platinum (Pt), iridium (Ir), nickel (Ni), or palladium (Pd), The second pinning layer can be the same composition and configuration as the first, or can be of a different composition or configuration. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.Type: GrantFiled: March 5, 2021Date of Patent: January 10, 2023Assignee: Applied Materials, Inc.Inventors: Lin Xue, Chi Hong Ching, Rongjun Wang, Mahendra Pakala
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Patent number: 11522126Abstract: A film stack for a magnetic tunnel comprises a substrate, a magnetic reference layer disposed over the substrate, and a tunnel barrier layer disposed over the magnetic reference layer. The film stack further comprises a magnetic storage layer disposed over the tunnel barrier layer, and a capping layer disposed over the magnetic storage layer. Further, the film stack comprises at least one protection layer disposed between the magnetic reference layer and the tunnel barrier layer and disposed between the magnetic storage layer and the capping layer. Additionally, a material forming the at least one protection layer differs from at least one of a material forming the magnetic reference layer and a material forming the magnetic storage layer.Type: GrantFiled: October 14, 2019Date of Patent: December 6, 2022Assignee: Applied Materials, Inc.Inventors: Lin Xue, Jaesoo Ahn, Sahil Patel, Chando Park, Mahendra Pakala
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Patent number: 11374170Abstract: Embodiments of the disclosure relate to methods for fabricating structures used in memory devices. More specifically, embodiments of the disclosure relate to methods for fabricating MTJ structures in memory devices. In one embodiment, the method includes forming a MTJ structure, depositing a encapsulating layer on a top and sides of the MTJ structure, depositing a dielectric material on the encapsulating layer, removing the dielectric material and the encapsulating layer disposed on the top of the MTJ structure by a chemical mechanical planarization (CMP) process to expose the top of the MTJ structure, and depositing a contact layer on the MTJ structure. The method utilizes a CMP process to expose the top of the MTJ structure instead of an etching process, which avoids damaging the MTJ structure and leads to improved electrical contact between the MTJ structure and the contact layer.Type: GrantFiled: September 25, 2018Date of Patent: June 28, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Lin Xue, Jaesoo Ahn, Hsin-wei Tseng, Mahendra Pakala
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Patent number: 11374165Abstract: A process sequence is provided to provide an ultra-smooth (0.2 nm or less) bottom electrode surface for depositing magnetic tunnel junctions thereon. In one embodiment, the sequence includes forming a bottom electrode pad through bulk layer deposition followed by patterning and etching. Oxide is then deposited over the formed bottom electrode pads and polished back to expose the bottom electrode pads. A bottom electrode buff layer is then deposited thereover following a pre-clean operation. The bottom electrode buff layer is then exposed to a chemical mechanical polishing process to improve surface roughness. An magnetic tunnel junction deposition is then performed over the bottom electrode buff layer.Type: GrantFiled: March 5, 2020Date of Patent: June 28, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Lin Xue, Sajjad Amin Hassan, Mahendra Pakala, Jaesoo Ahn
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Publication number: 20220115439Abstract: Implementations of the present disclosure generally relate to a memory device. More specifically, implementations described herein generally relate to a SOT-MRAM. The SOT-MRAM includes a memory cell having a magnetic storage layer disposed side by side and in contact with a SOT layer. The side by side magnetic storage layer and the SOT layer can achieve the switching of the magnetic storage layer by reversing the direction of the electrical current flowing through the SOT layer without any additional conditions.Type: ApplicationFiled: January 16, 2020Publication date: April 14, 2022Inventors: Lin XUE, Chando PARK, Jaesoo AHN, Hsin-wei TSENG, Mahendra PAKALA
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Patent number: 11251364Abstract: Embodiments herein provide film stacks that include a buffer layer; a synthetic ferrimagnet (SyF) coupling layer; and a capping layer, wherein the capping layer comprises one or more layers, and wherein the capping layer, the buffer layer, the SyF coupling layer, or a combination thereof, is not fabricated from Ru.Type: GrantFiled: January 27, 2020Date of Patent: February 15, 2022Assignee: Applied Materials, Inc.Inventors: Lin Xue, Chi Hong Ching, Jaesoo Ahn, Mahendra Pakala, Rongjun Wang
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Patent number: 11245069Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one embodiment, the method includes patterning a film stack having a tunneling barrier layer disposed between a magnetic reference layer and a magnetic storage layer disposed on a substrate to remove a portion of the film stack from the substrate until an upper surface of the substrate is exposed, forming a sidewall passivation layer on sidewalls of the patterned film stack and subsequently performing a thermal annealing process to the film stack.Type: GrantFiled: June 30, 2016Date of Patent: February 8, 2022Assignee: Applied Materials, Inc.Inventors: Lin Xue, Jaesoo Ahn, Mahendra Pakala, Chi Hong Ching, Rongjun Wang
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Patent number: 11239086Abstract: Embodiments described herein relate to substrate processing methods. More specifically, embodiments of the disclosure provide for an MRAM back end of the line integration process which utilizes a zero mark for improved patterning alignment. In one embodiment, the method includes fabricating a substrate having at least a bottom contact and a via extending from the bottom contact in a first region and etching a zero mark in the substrate in a second region apart from the first region. The method also includes depositing a touch layer over the substrate in the first region and the second region, depositing a memory stack over the touch layer in the first region and the second region, and depositing a hardmask over the memory stack layer in the first region and the second region.Type: GrantFiled: April 26, 2019Date of Patent: February 1, 2022Assignee: Applied Materials, Inc.Inventors: Hsin-wei Tseng, Mahendra Pakala, Lin Xue, Jaesoo Ahn, Sajjad Amin Hassan
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Publication number: 20220013716Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one example, a film stack utilized to form a magnetic tunnel junction structure on a substrate includes a pinned layer disposed on a substrate, wherein the pinned layer comprises multiple layers including at least one or more of a Co containing layer, Pt containing layer, Ta containing layer, an Ru containing layer, an optional structure decoupling layer disposed on the pinned magnetic layer, a magnetic reference layer disposed on the optional structure decoupling layer, a tunneling barrier layer disposed on the magnetic reference layer, a magnetic storage layer disposed on the tunneling barrier layer, and a capping layer disposed on the magnetic storage layer.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Inventors: Lin XUE, Jaesoo AHN, Mahendra PAKALA, Chi Hong CHING, Rongjun WANG
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Publication number: 20210351344Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for hybrid (or called integrated) spin-orbit-torque magnetic spin-transfer-torque magnetic random access memory (SOT-STT MRAM) applications. In one embodiment, the method includes one or more magnetic tunnel junction structures disposed on a substrate, the magnetic tunnel junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a spin orbit torque (SOT) layer disposed on the magnetic tunnel junction structure, and a back end structure disposed on the spin orbit torque (SOT) layer.Type: ApplicationFiled: July 19, 2021Publication date: November 11, 2021Applicants: Applied Materials, Inc., Applied Materials, Inc.Inventors: Hsin-wei TSENG, Chando PARK, Jaesoo AHN, Lin XUE, Mahendra PAKALA
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Publication number: 20210351342Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.Type: ApplicationFiled: May 11, 2020Publication date: November 11, 2021Inventors: Minrui YUI, Wenhui WANG, Jaesoo AHN, Jong Mun KIM, Sahil PATEL, Lin XUE, Chando PARK, Mahendra PAKALA, Chentsau Chris YING, Huixiong DAI, Christopher S. Ngai
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Publication number: 20210320247Abstract: Embodiments of the disclosure provide methods for forming MTJ structures from a film stack disposed on a substrate for MRAM applications and associated MTJ devices. The methods described herein include forming the film properties of material layers from the film stack to create a film stack with a sufficiently high perpendicular magnetic anisotropy (PMA). An iron containing oxide capping layer is utilized to generate the desirable PMA. By utilizing an iron containing oxide capping layer, thickness of the capping layer can be more finely controlled and reliance on boron at the interface of the magnetic storage layer and the capping layer is reduced.Type: ApplicationFiled: May 4, 2021Publication date: October 14, 2021Inventors: Lin XUE, Chi Hong CHING, Xiaodong WANG, Mahendra PAKALA, Rongjun WANG
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Patent number: 11133460Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one example, a film stack utilized to form a magnetic tunnel junction structure on a substrate includes a pinned layer disposed on a substrate, wherein the pinned layer comprises multiple layers including at least one or more of a Co containing layer, Pt containing layer, Ta containing layer, an Ru containing layer, an optional structure decoupling layer disposed on the pinned magnetic layer, a magnetic reference layer disposed on the optional structure decoupling layer, a tunneling barrier layer disposed on the magnetic reference layer, a magnetic storage layer disposed on the tunneling barrier layer, and a capping layer disposed on the magnetic storage layer.Type: GrantFiled: February 21, 2017Date of Patent: September 28, 2021Assignee: Applied Materials, Inc.Inventors: Lin Xue, Jaesoo Ahn, Mahendra Pakala, Chi Hong Ching, Rongjun Wang
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Publication number: 20210234091Abstract: A method of etching a layer stack. The method may include providing a substrate in a process chamber, the substrate comprising an array of patterned features, arranged within a layer stack, the layer stack including at least one metal layer, and directing an ion beam to the substrate from an ion source, wherein the ion beam causes a physical sputtering of the at least one metal layer. The method may include directing a neutral reactive gas directly to the substrate, separately from the ion source, wherein the neutral reactive gas reacts with metallic species generated by the physical sputtering of the at least one metal layer.Type: ApplicationFiled: January 24, 2020Publication date: July 29, 2021Applicant: APPLIED Materials, Inc.Inventors: Jong Mun Kim, Mang-Mang Ling, Soham Asrani, Lin Xue, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
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Patent number: 11069853Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for hybrid (or called integrated) spin-orbit-torque magnetic spin-transfer-torque magnetic random access memory (SOT-STT MRAM) applications. In one embodiment, the method includes one or more magnetic tunnel junction structures disposed on a substrate, the magnetic tunnel junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a spin orbit torque (SOT) layer disposed on the magnetic tunnel junction structure, and a back end structure disposed on the spin orbit torque (SOT) layer.Type: GrantFiled: November 19, 2018Date of Patent: July 20, 2021Assignee: Applied Materials, Inc.Inventors: Hsin-Wei Tseng, Chando Park, Jaesoo Ahn, Lin Xue, Mahendra Pakala