Patents by Inventor Lin Yin
Lin Yin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180092670Abstract: A spinal fixation device includes a bone screw, a tulip-shaped seat, a rod seat, and a washer. The bone screw comprises a spherical head and a threaded elongated body extending along a first direction. The tulip-shaped seat comprises a bottom portion that has a through-opening shaped and dimensioned to receive the bone screw so that an inner surface of the bottom portion engages the spherical head of the bone screw and prevents the bone screw from passing entirely through the through-opening, while the spherical head remains polyaxially rotatable within the bottom portion of the tulip-shaped seat. The rod seat sits within and engages the inner surface of the tulip-shaped seat and the rod seat comprises a semispherical bottom that is shaped and dimensioned to engage the spherical head of the bone screw while the spherical head remains polyaxially rotatable within the bottom portion of the tulip-shaped seat.Type: ApplicationFiled: October 4, 2017Publication date: April 5, 2018Applicant: SPINEFRONTIER, INCInventors: JEREMY CROSSGROVE, MICHAEL EMERY, JACOB LUBINSKI, LIN YIN, KINGSLEY R. CHIN
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Publication number: 20170219449Abstract: A piezoresistive pressure sensor includes a substrate and a silicon device layer. The substrate has a cavity. The silicon device layer includes a diaphragm and a support element. A top surface of the diaphragm is connected to a top surface of the support element by one or more side surfaces. A recess of the silicon device layer is defined by the top surface of the diaphragm and the one or more side surfaces. A plurality of piezoresistive regions are on the top surface of the diaphragm, on the one or more side surfaces and on the top surface of the support element. A plurality of conductive regions are on the top surface of the support element. The plurality of conductive regions do not extend to the top surface of the diaphragm. The plurality of piezoresistive regions have a first ion dosage concentration. The plurality of conductive regions have a second ion dosage concentration. The second ion dosage concentration is greater than the first ion dosage concentration.Type: ApplicationFiled: January 25, 2017Publication date: August 3, 2017Applicant: Asia Pacific Microsystems, Inc.Inventors: Hung-Lin Yin, Cheng-Yi Chiang, Yu-Che Huang
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Patent number: 9603717Abstract: An expandable intervertebral implant includes a base body, a top endplate and a center component. The top endplate is configured to be placed onto an open top of the base body and to expand upward. The top endplate includes a plate, first and second side protrusions extending vertically downward from first and second sides of the plate, respectively, first and second protrusions including inclined surfaces and extending obliquely downward from a first end of the plate and third and fourth protrusions having a triangular shape with at least one inclined surface and extending downward from a second end of the plate. The center component is configured to be placed within the base body and to interface with the top endplate and to move longitudinally forward or backward within the base body, thereby causing the top endplate to expand upwards or move downward, respectively.Type: GrantFiled: July 1, 2014Date of Patent: March 28, 2017Assignee: SPINEFRONTIER, INCInventors: Matthew Ibarra, Aaron Ricica, Lin Yin
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Patent number: 9553055Abstract: The present disclosure provides a method for fabricating semiconductor devices having reinforcing elements. The method includes steps of providing a first wafer having a lower electrode layer and an insulation layer; forming a device layer; etching the device layer and the insulation layer to form recesses; etching the device layer to form separation trenches and upper electrodes; forming reinforcing elements; and depositing metal pads. The reinforcing elements strengthen the integration of the upper electrodes and the insulation layer.Type: GrantFiled: October 26, 2015Date of Patent: January 24, 2017Assignee: ASIA PACIFIC MICROSYSTEMS, INC.Inventor: Hung-Lin Yin
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Publication number: 20160240490Abstract: The present disclosure provides a method for fabricating semiconductor devices having reinforcing elements. The method includes steps of providing a first wafer having a lower electrode layer and an insulation layer; forming a device layer; etching the device layer and the insulation layer to form recesses; etching the device layer to form separation trenches and upper electrodes; forming reinforcing elements; and depositing metal pads. The reinforcing elements strengthen the integration of the upper electrodes and the insulation layer.Type: ApplicationFiled: October 26, 2015Publication date: August 18, 2016Applicant: ASIA PACIFIC MICROSYSTEMS, INC.Inventor: Hung-Lin Yin
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Patent number: 9161842Abstract: An interbody spinal fusion assembly includes an interbody cage, planar metal pins and bone fasteners. The interbody cage includes a metal cage and a PEEK insert. The PEEK insert is inserted into a slot of the metal cage and is secured to the metal cage with a pin. The assembled interbody cage is inserted in the space between two adjacent vertebras and is secured in placed with the planar metal pins and the bone fasteners.Type: GrantFiled: September 23, 2013Date of Patent: October 20, 2015Assignee: SPINEFRONTIER, INCInventors: Kingsley R. Chin, Lin Yin, Vito Lore, Matthew Ibarra, Michael Drnek
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Publication number: 20150279664Abstract: The present disclosure provides a method for fabricating semiconductor devices having high-precision gaps. The method includes steps of providing a first wafer; forming two or more regions having various ion dosage concentrations on a first surface of the first wafer; thermally oxidizing the first wafer so as to grow oxide layers with various thicknesses on the first surface of the first wafer; and bonding a second wafer to the thickest oxide layer of the first wafer so as to form one or more gaps.Type: ApplicationFiled: March 27, 2015Publication date: October 1, 2015Applicant: ASIA PACIFIC MICROSYSTEMS, INC.Inventor: Hung-Lin Yin
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Publication number: 20150216573Abstract: An implantable cervical plate assembly includes a cervical plate, one or more bone fasteners. The cervical plate comprises an elongated asymmetric body having one or more through-openings extending from the front surface to the back surface of the elongated asymmetric body. The one or more bone fasteners are configured to be inserted through the one or more through-openings, respectively. The bone fasteners comprise a threaded main body and a head that includes one or more breakable structures configured to be broken when inserted into a groove and then unflex and remain captured within the groove.Type: ApplicationFiled: March 3, 2015Publication date: August 6, 2015Applicant: SPINEFRONTIER, INCInventors: KINGSLEY R. CHIN, LIN YIN, JACOB R. LUBINSKI
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Publication number: 20150012097Abstract: An expandable intervertebral implant includes a base body, a top endplate and a center component. The top endplate is configured to be placed onto an open top of the base body and to expand upward. The top endplate includes a plate, first and second side protrusions extending vertically downward from first and second sides of the plate, respectively, first and second protrusions including inclined surfaces and extending obliquely downward from a first end of the plate and third and fourth protrusions having a triangular shape with at least one inclined surface and extending downward from a second end of the plate. The center component is configured to be placed within the base body and to interface with the top endplate and to move longitudinally forward or backward within the base body, thereby causing the top endplate to expand upwards or move downward, respectively.Type: ApplicationFiled: July 1, 2014Publication date: January 8, 2015Applicant: SPINEFRONTIER INCInventors: Matthew IBARRA, AARON RICICA, LIN YIN
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Patent number: 8916449Abstract: A substrate bonding method comprises the following steps. Firstly, a first substrate and a second substrate are provided, wherein a surface of the first substrate is covered by a first Ag layer and a surface of the second substrate is covered by a second Ag layer and a metallic layer from bottom to top, wherein the metallic layer comprises a first Sn layer. Secondly, a bonding process is performed by aligning the first and second substrates followed by bringing the metallic layer into contact with the first Ag layer followed by applying a load while heating to a predetermined temperature in order to form Ag3Sn intermetallic compounds. Finally, cool down and remove the load to complete the bonding process.Type: GrantFiled: March 15, 2013Date of Patent: December 23, 2014Assignee: Asia Pacific Microsystems, Inc.Inventors: Hung-Lin Yin, Jerwei Hsieh, Li-Yuan Lin
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Publication number: 20140200670Abstract: A spinal stabilization implant assembly includes a first cervical stabilization plate comprising an elongated body having a top portion and a bottom portion, and a second cervical stabilization plate comprising an elongated body having a top portion and a bottom portion. The bottom portion of the first cervical stabilization plate is attached to a first vertebra and the top portion of the second stabilization plate is stacked end-to-end below the bottom portion of the first cervical stabilization plate and is attached to the same first vertebra. The top portion of the first cervical stabilization plate is attached to a second vertebra, and the bottom portion of the second stabilization plate is attached to a third vertebra. The second vertebra is superior to the first vertebra, and the third vertebra is inferior to the first vertebra.Type: ApplicationFiled: January 16, 2013Publication date: July 17, 2014Applicant: SPINEFRONTIER INCInventors: Kingsley R. Chin, Matthew IBARRA, Craig HENSHAW, JEREMY CROSSGROVE, MICHAEL DRNEK, LIN YIN, AARON RICICA
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Publication number: 20140088711Abstract: An interbody spinal fusion assembly includes an interbody cage, planar metal pins and bone fasteners. The interbody cage includes a metal cage and a PEEK insert. The PEEK insert is inserted into a slot of the metal cage and is secured to the metal cage with a pin. The assembled interbody cage is inserted in the space between two adjacent vertebras and is secured in placed with the planar metal pins and the bone fasteners.Type: ApplicationFiled: September 23, 2013Publication date: March 27, 2014Applicant: SPINEFRONTIER, INC.Inventors: KINGSLEY R. CHIN, LIN YIN, VITO LORE, MATTHEW IBARRA, MICHAEL DRNEK
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Publication number: 20130285248Abstract: A substrate bonding method comprises the following steps. Firstly, a first substrate and a second substrate are provided, wherein a surface of the first substrate is covered by a first Ag layer and a surface of the second substrate is covered by a second Ag layer and a metallic layer from bottom to top, wherein the metallic layer comprises a first Sn layer. Secondly, a bonding process is performed by aligning the first and second substrates followed by bringing the metallic layer into contact with the first Ag layer followed by applying a load while heating to a predetermined temperature in order to form Ag3Sn intermetallic compounds. Finally, cool down and remove the load to complete the bonding process.Type: ApplicationFiled: March 15, 2013Publication date: October 31, 2013Applicant: Asia Pacific Microsystems, Inc.Inventors: Hung-Lin Yin, Jerwei Hsieh, Li-Yuan Lin
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Patent number: 8149904Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: GrantFiled: January 24, 2003Date of Patent: April 3, 2012Assignee: Broadcom CorporationInventors: Gregory H. Efland, Haixiang Liang, Kevin H. Peterson, Yuanjie Chen, Alan G. Corry, Nino P. Ferrario, Jeff Z. Guan, Meera Prahlad, Ilya Stomakhin, Yongbing Wan, Larry C. Yamano, Lin Yin, Gong-San Yu, George A. Papanicolaou
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Patent number: 7968991Abstract: A stacked package module is disclosed, which comprises: a first package structure comprising a first circuit board with a first chip embedded therein, wherein the first chip has a plurality of electrode pads; the first circuit board comprises a first surface, an opposite second surface, a plurality of exposed electro-connecting ends, a plurality of first conductive pads on the first surface, a plurality of conductive vias, and at least one circuit layer, therewith the electrode pads of the first chip electrically connecting to the electro-connecting ends and the first conductive pads directly through the conductive vias and the circuit layer; and a second package structure electrically connecting to the first package structure through a plurality of first solder balls to make a package on package. The stacked package module of this invention has characters of compact size, high performance, high flexibility, and detachability.Type: GrantFiled: October 25, 2007Date of Patent: June 28, 2011Assignee: Unimicron Technology Corp.Inventors: Lin-Yin Wong, Mao-Hua Yeh, Wang-Hsiang Tsai
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Patent number: 7880296Abstract: The present invention provides a chip carrier structure having a semiconductor chip embedded therein and a protective metal layer formed thereon and a fabrication method thereof. The chip carrier structure includes a chip-embedded carrier structure, and a metal layer formed by electroplating on the bottom surface and side surfaces of the chip-embedded carrier structure. The metal layer prevents moisture from crossing the side surfaces of the chip-embedded carrier structure, so as to prevent delamination, provide a shielding effect, and improve heat dissipation through the metal layer.Type: GrantFiled: March 7, 2008Date of Patent: February 1, 2011Assignee: Unimicron Technology Corp.Inventors: Lin-Yin Wong, Zao-Kuo Lai
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Patent number: 7809902Abstract: Provided is a system and method for de-interleaving a data stream stored in a buffer having a plurality of memory locations. Each location has a memory width of (W) bytes and the data stream is formed of a number of data words each including (N) number of data bytes, and (N) is a non-integer multiple of the width (W). The method includes storing the data words into respective memory locations and appending each of the stored data words with number (X) of dummy bytes, a sum of (N)+(X) being an integer multiple of the width (W). The appended dummy bytes are then stored in the respective memory locations.Type: GrantFiled: January 24, 2003Date of Patent: October 5, 2010Assignee: Broadcom CorporationInventors: Gregory H. Efland, Jeff Z. Guan, Lin Yin
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Patent number: 7656015Abstract: Provided is a packaging substrate with a heat-dissipating structure, including a core layer with a first surface and an opposite second surface having a first metal layer and a second metal layer respectively. Portions of the first metal layer are exposed from a second cavity penetrating the core layer and second metal layer. Portions of the second metal layer are exposed from a first cavity penetrating the core layer and first metal layer. Semiconductor chips each having an active surface with electrode pads thereon and an opposite inactive surface are received in the first and second cavities and attached to the second metal layer and the first metal layer respectively. Conductive vias disposed in build-up circuit structures electrically connect to the electrode pads of the semiconductor chips. A heat-dissipating through hole penetrating the core layer and build-up circuit structures connects the metal layers and contact pads.Type: GrantFiled: September 12, 2008Date of Patent: February 2, 2010Assignee: Phoenix Precision Technology CorporationInventors: Lin-Yin Wong, Mao-Hua Yeh
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Patent number: 7507915Abstract: A stack structure of carrier boards embedded with semiconductor components and a method for fabricating the same are proposed. A first carrier board and a second carrier board, each of which having at least one through hole, are provided. A first protecting layer and a second protecting layer are formed on a surface of the first and second carrier boards respectively. At least one first semiconductor component and at least one second semiconductor component are disposed on the first and second protecting layers and accommodated in the first and second through holes respectively. A dielectric layer is laminated between the surfaces of the first and second carrier boards without the protecting layers formed thereon. Thus, a modularized package structure with reduced space waste is formed.Type: GrantFiled: August 4, 2006Date of Patent: March 24, 2009Assignee: Phoenix Precision Technology CorporationInventors: Chia-Wei Chang, Lin-Yin Wong, Zao-Kuo Lai, Chung-Cheng Lien
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Publication number: 20090072384Abstract: Provided is a packaging substrate with a heat-dissipating structure, including a core layer with a first surface and an opposite second surface having a first metal layer and a second metal layer respectively. Portions of the first metal layer are exposed from a second cavity penetrating the core layer and second metal layer. Portions of the second metal layer are exposed from a first cavity penetrating the core layer and first metal layer. Semiconductor chips each having an active surface with electrode pads thereon and an opposite inactive surface are received in the first and second cavities and attached to the second metal layer and the first metal layer respectively. Conductive vias disposed in build-up circuit structures electrically connect to the electrode pads of the semiconductor chips. A heat-dissipating through hole penetrating the core layer and build-up circuit structures connects the metal layers and contact pads.Type: ApplicationFiled: September 12, 2008Publication date: March 19, 2009Applicant: Phoenix Precision Technology CorporationInventors: Lin-Yin Wong, Mao-Hua Yeh