Abstract: A method for forming a field effect transistor device includes forming a gate stack portion on a substrate, forming a spacer portion on the gates stack portion and a portion of the substrate, removing an exposed portion of the substrate, epitaxially growing a first silicon material on the exposed portion of the substrate, removing a portion of the epitaxially grown first silicon material to expose a second portion of the substrate, and epitaxially growing a second silicon material on the exposed second portion of the substrate and the first silicon material.

Abstract: A method for forming a field effect transistor device includes forming a gate stack portion on a substrate, forming a spacer portion on the gates stack portion and a portion of the substrate, removing an exposed portion of the substrate, epitaxially growing a first silicon material on the exposed portion of the substrate, removing a portion of the epitaxially grown first silicon material to expose a second portion of the substrate, and epitaxially growing a second silicon material on the exposed second portion of the substrate and the first silicon material.

Abstract: A method for forming a field effect transistor device includes forming a gate stack portion on a substrate, forming a spacer portion on the gates stack portion and a portion of the substrate, removing an exposed portion of the substrate, epitaxially growing a first silicon material on the exposed portion of the substrate, removing a portion of the epitaxially grown first silicon material to expose a second portion of the substrate, and epitaxially growing a second silicon material on the exposed second portion of the substrate and the first silicon material.

Abstract: A stressed MOS device is provided that includes a silicon substrate, a gate electrode and an epitaxial layer of stress inducing monocrystalline semiconductor material. The silicon substrate is characterized by a monocrystalline silicon lattice constant. The gate electrode overlies a silicon channel region at the surface of the silicon substrate. The epitaxial layer of stress inducing monocrystalline semiconductor material is grown in the silicon substrate. The epitaxial layer of stress inducing monocrystalline semiconductor material has a lattice constant greater than the monocrystalline silicon lattice constant, and extends under the silicon channel region.

Abstract: Stressed MOS devices and methods for their fabrication are provided. The stressed MOS device comprises a T-shaped gate electrode formed of a material having a first Young's modulus. The T-shaped gate electrode includes a first vertical portion and a second horizontal portion. The vertical portion overlies a channel region in an underlying substrate and has a first width; the horizontal portion has a second greater width. A tensile stressed film is formed overlying the second horizontal portion, and a material having a second Young's modulus less than the first Young's modulus fills the space below the second horizontal portion. The tensile stressed film imparts a stress on the horizontal portion of the gate electrode and this stress is transmitted through the vertical portion to the channel of the device. The stress imparted to the channel is amplified by the ratio of the second width to the first width.

Abstract: Stressed MOS devices and methods for their fabrication are provided. The stressed MOS device comprises a T-shaped gate electrode formed of a material having a first Young's modulus. The T-shaped gate electrode includes a first vertical portion and a second horizontal portion. The vertical portion overlies a channel region in an underlying substrate and has a first width; the horizontal portion has a second greater width. A tensile stressed film is formed overlying the second horizontal portion, and a material having a second Young's modulus less than the first Young's modulus fills the space below the second horizontal portion. The tensile stressed film imparts a stress on the horizontal portion of the gate electrode and this stress is transmitted through the vertical portion to the channel of the device. The stress imparted to the channel is amplified by the ratio of the second width to the first width.

Abstract: A stressed MOS device is provided that includes a silicon substrate, a gate electrode and an epitaxial layer of stress inducing monocrystalline semiconductor material. The silicon substrate is characterized by a monocrystalline silicon lattice constant. The gate electrode overlies a silicon channel region at the surface of the silicon substrate. The epitaxial layer of stress inducing monocrystalline semiconductor material is grown in the silicon substrate. The epitaxial layer of stress inducing monocrystalline semiconductor material has a lattice constant greater than the monocrystalline silicon lattice constant, and extends under the silicon channel region.

Abstract: A stressed MOS device and a method for its fabrication are provided. The MOS device comprises a substrate having a surface, the substrate comprising a monocrystalline semiconductor material having a first lattice constant. A channel region is formed of the monocrystalline silicon material adjacent the surface. A stress inducing monocrystalline semiconductor material having a second lattice constant greater than the first lattice constant is grown under the channel region to exert a horizontal tensile stress on the channel region.

Abstract: Methods for fabricating a stressed MOS device is provided. One method comprises the steps of providing a monocrystalline semiconductor substrate having a surface and a channel abutting the surface. A gate electrode having a first edge and a second edge is formed overlying the monocrystalline semiconductor substrate. The substrate is anisotropically etched to form a first recess aligned with the first edge and a second recess aligned with the second edge. The substrate is further isotropically etched to form a third recess in the substrate extending beneath the channel. The third recess is filled with an expanding material to exert an upward force on the channel and the first and second recesses are filled with a contact material. Conductivity determining ions are implanted into the contact material to form a source region and a drain region aligned with the first and second edges, respectively.

Abstract: A semiconductor device with a replacement metal gate and the process for making the same removes a dummy gate from a semiconductor device. Within the recess left by the dummy gate is a silicon layer on a gate dielectric layer. A replacement metal is deposited on the thin silicon layer and then reacted with the silicon layer to form a metal-rich silicon layer on the gate dielectric layer.