Abstract: A curable polyolefin composition is provided. The curable polyolefin composition comprises: (A) a polyolefin having at least two aliphatic unsaturated bonds per molecule and having a viscosity at 25° C. of less than 2,500 mPa·s; (B) an organopolysiloxane having at least two silicon atom-bonded hydrogen atoms per molecule; (C) a hydrosilylation reaction catalyst; and (D) a thermal conductive filler. The curable polyolefin composition can be cured to form a soft material with good thermal conductive properties.

Abstract: A method for hardware management of DMA transfer commands includes accessing, by a first DMA engine, a DMA transfer command and determining a first portion of a data transfer requested by the DMA transfer command. Transfer of a first portion of the data transfer by the first DMA engine is initiated based at least in part on the DMA transfer command. Similarly, a second portion of the data transfer by a second DMA engine is initiated based at least in part on the DMA transfer command. After transferring the first portion and the second portion of the data transfer, an indication is generated that signals completion of the data transfer requested by the DMA transfer command.

Abstract: Systems, apparatuses, and methods for implementing a centralized interrupt controller to aggregate interrupts generated across multiple semiconductor dies are disclosed. A system includes multiple interrupt sources on multiple semiconductor dies. A centralized interrupt controller on one of the semiconductor dies receives and aggregates interrupts from the multiple interrupt sources on the multiple semiconductor dies. This facilitates a single transmission point for forwarding the interrupts to the processor and operating system responsible for handling interrupts. Each interrupt source embeds an ID when conveying an interrupt to the interrupt controller. This allows the interrupt controller to differentiate between the interrupt sources and to identify which source generated a given interrupt. The interrupt controller conveys an indication of the source of the interrupt to the processor when forwarding the interrupt to the processor.

Abstract: A waterborne polyurethane dispersion is provided. The waterborne polyurethane dispersion is prepared by using a tri-functionality polyether polyol as part of the polyols for forming the prepolymer and a hydrophilic amino siloxane co-chain extender, and can exhibit superior performance properties such as enhanced color fastness, improved low temperature stability, good anti-stickiness, bally flex resistance, anti-abrasion and mechanical properties. A laminated synthetic leather article prepared with said waterborne polyurethane dispersion as well the method for preparing the synthetic leather article are also provided.

Abstract: Systems, apparatuses, and methods for implementing duplicated registers for access by initiators across multiple semiconductor dies are disclosed. A system includes multiple initiators on multiple semiconductor dies of a chiplet processor. One of the semiconductor dies is the master die, and this master die has copies of registers which can be accessed by the multiple initiators on the multiple semiconductor dies. When a given initiator on a given secondary die generates a register access, the register access is routed to the master die and a particular duplicate copy of the register maintained for the given secondary die. From the point of view of software, the multiple semiconductor dies appear as a single die, and the multiple initiators appear as a single initiator. Multiple types of registers can be maintained by the master die, with a flush register being one of the register types.

Abstract: A thermal interface material is provided. The thermal interface material comprises: (A) a polyolefin having at least two hydroxy groups per molecule; (B) at least one thermally conductive filler; (C) a phase change material with a melting point of 25 to 150° C.; and (D) a coupling agent. A content of component (B) is at least 80 mass %, a content of component (C) is 0.01 to 1 mass %, and a content of component (D) is 0.1 to 1 mass %, each based on a total mass of the thermal interface material. The thermal interface material becomes softer as its temperature increases. Meanwhile, the thermal interface material generally does not exhibit pumping-out in electronic devices during power cycling.

Abstract: A system may include a memory and a processor in communication with the memory configured to perform operations. The may operations include obtaining transaction logs in blocks from nodes of a data storage system. The operations may include, for each transaction log, splitting the transaction log into log entries, grouping log entries into groups associated with a same data source, and writing the log entries of the groups to empty blocks such that log entries from different groups do not share a same block. The operations may include identifying a same sequence of log entries from the written transaction logs and uploading first blocks of a first transaction log, including the same sequence of log entries, to an object-based storage without uploading second blocks of a second transaction log including the same sequence of log entries to the object-based storage.

Abstract: The invention relates to an electronic calendar system method, and computer program product thereof. The system includes a cloud platform, at least one user terminal, at least one creative terminal, and a display terminal. The cloud platform is connected to the user terminal and the creative terminal, and the user terminal is connected to the display terminal. The creative terminal provides the digital creative content to transmit to the cloud platform. The user terminal obtains at least one digital calendar template and digital creative content front the cloud platform. The user terminal combines the digital calendar template, the digital creative content, and the digital calendar schedule to generate a graphical digital calendar, and transmits the graphical digital calendar to the display terminal by the user the terminal. The display terminal outputs the graphical digital calendar.

Abstract: A system may include a memory and a processor in communication with the memory configured to perform operations. The may operations include obtaining transaction logs in blocks from nodes of a data storage system. The operations may include, for each transaction log, splitting the transaction log into log entries, grouping log entries into groups associated with a same data source, and writing the log entries of the groups to empty blocks such that log entries from different groups do not share a same block. The operations may include identifying a same sequence of log entries from the written transaction logs and uploading first blocks of a first transaction log, including the same sequence of log entries, to an object-based storage without uploading second blocks of a second transaction log including the same sequence of log entries to the object-based storage.

Abstract: The present invention discloses a multifunctional display device, which includes a display unit and a support member. The display unit includes a first side and a second opposite to the first side. The support member is disposed on the first side and includes a reverse hanging unit disposed near the second side. According to requirement, the reverse hanging unit may be used to hang the reversed display unit onto a supporter. While the multifunctional display device is placed on a desk top, the display unit may present the information of a calendar, whereby the multifunctional display device can function as an electronic calendar. While the multifunctional display device is hung reversely via the reverse hanging unit, the display unit may present the information of goods, whereby the multifunctional display device can function as an electronic shelf label.

Abstract: A packaging box includes a box body and at least one side cover. The box body includes a first sheet, a second sheet, a first opening, a second opening, and a first side portion. The second sheet is arranged opposite to the first sheet. The first sheet, the second sheet, and the first portion have a detachable sheet. The side cover covers the first opening and includes a first body sheet covering the first opening and a second body sheet fixed to the first opening with a protruding sheet. When the detachable sheet is detached, the box body is folded in half and the protruding sheet is bent and inserted into the second opening to fix the folded box body. A part of the box body where the detachable sheet is detached is used as a fixing portion. The packaging box serves packaging and supporting by changing shape.

Abstract: In an approach, a processor receives, at an edge node, a message from an IoT device associated with the edge node, the message being embedded with at least one non-fungible token (NFT) and each of the at least one NFT representing a corresponding authorization associated with the IoT device. A processor retrieves, at the edge node, the at least one NFT from the received message. A processor validates, at the edge node, the received message based on the retrieved at least one NFT. A processor, responsive to validating the received message, forwards, by the edge node, the received message to a center node associated with the edge node.

Abstract: Disclosed is a localised surface plasmon resonance (LSPR) nanopillar assembly. The LSPR assembly is for use in sensing the presence of a biomarker when attached to a quantum dot. The LSPR assembly comprises a substrate and an array. The array comprises a LSPR nanopillar and a polymer spacer attached to the nanopillar. The LSPR assembly further comprises an antibody attached to the at least one polymer spacer. In the LSPR assembly, a combined height of the polymer spacer and antibody is selected by varying the number of monomer units of the polymer spacer, so that, when in use with the biomarker and the quantum dot, the quantum dot is at a predetermined distance from the nanopillar.

Abstract: A method for hardware management of DMA transfer commands includes accessing, by a first DMA engine, a DMA transfer command and determining a first portion of a data transfer requested by the DMA transfer command. Transfer of a first portion of the data transfer by the first DMA engine is initiated based at least in part on the DMA transfer command. Similarly, a second portion of the data transfer by a second DMA engine is initiated based at least in part on the DMA transfer command. After transferring the first portion and the second portion of the data transfer, an indication is generated that signals completion of the data transfer requested by the DMA transfer command.

Abstract: Systems, apparatuses, and methods for implementing duplicated registers for access by initiators across multiple semiconductor dies are disclosed. A system includes multiple initiators on multiple semiconductor dies of a chiplet processor. One of the semiconductor dies is the master die, and this master die has copies of registers which can be accessed by the multiple initiators on the multiple semiconductor dies. When a given initiator on a given secondary die generates a register access, the register access is routed to the master die and a particular duplicate copy of the register maintained for the given secondary die. From the point of view of software, the multiple semiconductor dies appear as a single die, and the multiple initiators appear as a single initiator. Multiple types of registers can be maintained by the master die, with a flush register being one of the register types.

Abstract: Apparatuses, systems and methods for performing efficient power management for a processing unit. A processing unit includes two partitions, each assigned to a respective power domain with operating parameters, and each with a respective direct memory access (DMA) engine. If a controller determines a task type of a received task indicates the task is to be processed by components of the second partition, then the controller assigns the task to the second partition and maintains the operational parameters of the first power domain for the components of the first partition or selects lower performance operational parameters of the first power domain. The processing unit accesses data stored in memory using a DMA engine and operational parameters of the second partition. Additionally, the second partition processes the task using the operational parameters of the second power domain.

Abstract: A traceback solution is provided. For a network of autonomous systems, the traceback solution traces the autonomous system path taken by traffic flows. Every link in the traceback path is created, verified, and audited by autonomous systems. Multiple autonomous systems may take part in the process, making the system robust against fake information. The database used to store the validated traceback paths is a decentralized and distributed storage. Multiple copies of the database may be maintained by the network of autonomous systems. The database may be accessible by any participating autonomous system; and is not accessible from outside the network of autonomous systems. The traceback solution achieves both validation and non-repudiation property among the ASes. The traceback solution mitigates some important attack scenarios that might be targeted specifically at the traceback solution.

Abstract: Systems, apparatuses, and methods for implementing a centralized interrupt controller to aggregate interrupts generated across multiple semiconductor dies are disclosed. A system includes multiple interrupt sources on multiple semiconductor dies. A centralized interrupt controller on one of the semiconductor dies receives and aggregates interrupts from the multiple interrupt sources on the multiple semiconductor dies. This facilitates a single transmission point for forwarding the interrupts to the processor and operating system responsible for handling interrupts. Each interrupt source embeds an ID when conveying an interrupt to the interrupt controller. This allows the interrupt controller to differentiate between the interrupt sources and to identify which source generated a given interrupt. The interrupt controller conveys an indication of the source of the interrupt to the processor when forwarding the interrupt to the processor.

Abstract: Systems, apparatuses, and methods for implementing a primary input/output (PIO) queue for host and guest operating systems (OS's) are disclosed. A system includes a PIO queue, one or more compute units, and a control unit. The PIO queue is able to store work commands for multiple different types of OS's, including host and guest OS's. The control unit is able to dispatch multiple work commands from multiple OS's to execute concurrently on the compute unit(s). This allows for execution of work commands by different OS's without the processing device(s) having to incur the latency of a world switch.

Abstract: A business-card type display device, connected to a sling that hangs on the body of a user, includes a display and a casing. The display has a display screen. The casing covers the display. The casing is provided with a display-installed portion therein. The surface of the casing is provided with a display opening whose position corresponds to the position of the display-installed portion. The surface of the casing is provided with a sling-connected portion above the display-installed portion. The sling-connected portion is connected to the sling. The display is installed in the display-installed portion. The display screen emerges from the display opening. The identification information displayed by the business-card type display device can be rapidly changed, which is very effective in use.