Patents by Inventor Lior Amar

Lior Amar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11748653
    Abstract: Apparatuses, systems, program products, and method are disclosed for machine learning abstraction. An apparatus includes an objective module configured to receive an objective to be analyzed using machine learning. An apparatus includes a grouping module configured to select a logical grouping of one or more machine learning pipelines to analyze a received objective. An apparatus includes an adjustment module configured to dynamically adjust one or more machine learning settings for a logical grouping of one or more machine learning pipelines based on feedback generated in response to analyzing a received objective.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: September 5, 2023
    Assignee: DataRobot, Inc.
    Inventors: Nisha Talagala, Vinay Sridhar, Swaminathan Sundararaman, Sindhu Ghanta, Lior Amar, Lior Khermosh, Bharath Ramsundar, Sriram Subramanian, Drew Roselli
  • Publication number: 20230196101
    Abstract: An automated machine learning (“ML”) method may include training a first machine learning model using a first machine learning algorithm and a training data set; validating the first machine learning model using a validation data set, wherein validating the first machine learning model comprises generating an error data set; training a second machine learning model to predict a suitability of the first machine learning model for analyzing an inference data set, wherein the second machine learning model is trained using a second machine learning algorithm and the error data set; and triggering a remedial action associated with the first or second machine learning model in response to a predicted suitability of the first machine learning model for analyzing the inference data set not satisfying a suitability threshold.
    Type: Application
    Filed: November 16, 2022
    Publication date: June 22, 2023
    Applicant: DataRobot, Inc.
    Inventors: Sindhu Ghanta, Drew Roselli, Nisha Talagala, Vinay Sridhar, Swaminathan Sundararaman, Lior Amar, Lior Khermosh, Bharath Ramsundar, Sriram Subramanian
  • Publication number: 20210390455
    Abstract: The subject matter of this disclosure relates to systems and methods for monitoring and managing machine learning models and related data. Histogram structures can be used to aggregate streams of numerical data for storage and metric calculations. Drift in such data can be identified and monitored over time. When significant drift is detected and/or when model accuracy has deteriorated, models can be automatically refreshed with updated training data and/or replaced with one or more other models. A model controller is used to automate model monitoring and management activities across multiple prediction environments where models are deployed and prediction jobs are executed.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 16, 2021
    Inventors: Amanda Schierz, Drew Roselli, Dulcardo Arteaga, Christopher Cozzi, Samuel Clark, John Bledsoe, Mykola Novik, Amar Mudrankit, Lior Amar, Evan Chang, Scott Oglesby, Tristan Robert Spaulding
  • Publication number: 20200193313
    Abstract: Apparatuses, systems, program products, and methods are disclosed for interpretability-based machine learning adjustment during production. An apparatus includes a first results module that is configured to receive a first set of inference results of a first machine learning algorithm during inference of a production data set. An apparatus includes a second results module that is configured to receive a second set of inference results of a second machine learning algorithm during inference of a production data set. An apparatus includes an action module that is configured to trigger one or more actions that are related to a first machine learning algorithm in response to a comparison of first and second sets of inference results not satisfying explainability criteria.
    Type: Application
    Filed: December 14, 2018
    Publication date: June 18, 2020
    Applicant: Parallel Machines, Inc.
    Inventors: SINDHU GHANTA, DREW ROSELLI, NISHA TALAGALA, VINAY SRIDHAR, SWAMINATHAN SUNDARARAMAN, LIOR AMAR, LIOR KHERMOSH, BHARATH RAMSUNDAR, SRIRAM SUBRAMANIAN
  • Publication number: 20200034665
    Abstract: Apparatuses, systems, program products, and methods are disclosed for determining validity of machine learning algorithms for datasets. An apparatus includes a primary training module that is configured to train a first machine learning model for a first machine learning algorithm. An apparatus includes a primary validation module that is configured to validate a first machine learning model to generate an error data set. An apparatus includes a secondary training module that is configured to train a second machine learning model for a second machine learning algorithm using an error data set. A second machine learning algorithm may be configured to predict a suitability of a first machine learning model for analyzing an inference data set. An apparatus includes an action module that is configured to trigger an action in response to a predicted suitability of the first machine learning model not satisfying a predetermined suitability threshold.
    Type: Application
    Filed: July 30, 2018
    Publication date: January 30, 2020
    Applicant: DataRobot, Inc.
    Inventors: SINDHU GHANTA, DREW ROSELLI, NISHA TALAGALA, VINAY SRIDHAR, SWAMINATHAN SUNDARARAMAN, LIOR AMAR, LIOR KHERMOSH, BHARATH RAMSUNDAR, SRIRAM SUBRAMANIAN
  • Publication number: 20190377984
    Abstract: Apparatuses, systems, program products, and method are disclosed for detecting suitability of machine learning models for datasets. An apparatus includes a training evaluation module configured to calculate a first statistical data signature for a training data set of a machine learning system using one or more predefined statistical algorithms. An apparatus includes an inference evaluation module configured to calculate a second statistical data signature for an inference data set of a machine learning system using one or more predefined statistical algorithms. An apparatus includes a score module configured to calculate a suitability score describing the suitability of a training data set to an inference data set as a function of a first and a second statistical data signature. An apparatus includes an action module configured to perform an action related to a machine learning system in response to a suitability score satisfying an unsuitability threshold.
    Type: Application
    Filed: June 6, 2018
    Publication date: December 12, 2019
    Applicant: DataRobot, Inc.
    Inventors: SINDHU GHANTA, DREW ROSELLI, NISHA TALAGALA, VINAY SRIDHAR, SWAMINATHAN SUNDARARAMAN, LIOR AMAR, LIOR KHERMOSH, BHARATH RAMSUNDAR, SRIRAM SUBRAMANIAN
  • Publication number: 20190108417
    Abstract: Apparatuses, systems, program products, and method are disclosed for machine learning abstraction. An apparatus includes an objective module configured to receive an objective to be analyzed using machine learning. An apparatus includes a grouping module configured to select a logical grouping of one or more machine learning pipelines to analyze a received objective. An apparatus includes an adjustment module configured to dynamically adjust one or more machine learning settings for a logical grouping of one or more machine learning pipelines based on feedback generated in response to analyzing a received objective.
    Type: Application
    Filed: June 5, 2018
    Publication date: April 11, 2019
    Applicant: Parallel Machines, Inc.
    Inventors: NISHA TALAGALA, VINAY SRIDHAR, SWAMINATHAN SUNDARARAMAN, SINDHU GHANTA, LIOR AMAR, LIOR KHERMOSH, BHARATH RAMSUNDAR, SRIRAM SUBRAMANIAN, DREW ROSELLI
  • Patent number: 9781225
    Abstract: Various embodiments of systems and methods to efficiently use a compute element to process a plurality of values distributed over a plurality of servers using a plurality of keys. In various embodiments, a system is configured to identify (or “derive”) the various server locations of various data values, to send requests to the various servers for the needed data values, to receive the data values from the various servers, and to process the various data values received. In various embodiments, requests are sent and data values are received via a switching network. In various embodiments, the servers are organized in a key value store, which may optionally be a shared memory pool. Various embodiments are systems and methods with a small number of compute elements and servers, but in alternative embodiments the elements may be expanded to hundreds or thousands of compute elements and servers.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: October 3, 2017
    Assignee: Parallel Machines Ltd.
    Inventors: Avner Braverman, Michael Adda, Lior Amar, Lior Khermosh, Gal Zuckerman
  • Patent number: 9690705
    Abstract: Described herein are systems and methods to process efficiently, according to a certain order, a plurality of data sets arranged in data blocks. In one embodiment, a first compute element receives from another compute element a first set of instructions that determine an order in which a plurality of data sets are to be processed as part of a processing task. Relevant data sets are then streamed into a cache memory associated with the first compute element, but the order of streaming is not by order of storage but rather by the order conveyed in the first set of instructions.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: June 27, 2017
    Assignee: Parallel Machines Ltd.
    Inventors: Michael Adda, Lior Amar, Avner Braverman, Lior Khermosh, Gal Zuckerman
  • Patent number: 9639407
    Abstract: Various systems and methods to perform efficiently a first processing task in conjunction with a plurality of data sets. A first code sequence comprises a plurality of general commands, and a specific command including a description of a first data processing task to be performed in conjunction with the data sets. The general commands are received and processed in a standard manner. The specific command is identified automatically by its nature, and the description within the specific command is then converted into a first sequence of executable instructions executable by a plurality of compute elements holding the plurality of data sets. The ultimate result is an efficient implementation of the first processing task. In some embodiments, the implementation of the first processing task is assisted by a pre-defined procedure that allocates the data sets to the compute elements and shares instances of executable instructions with the compute elements.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: May 2, 2017
    Assignee: Parallel Machines Ltd.
    Inventors: Avner Braverman, Michael Adda, Lior Amar, Lior Khermosh, Eli Finer, Gal Zuckerman
  • Patent number: 9639473
    Abstract: Described herein are systems and methods to prevent a controller in a DDIO (data direct input output) system from shifting currently-required data out of a cache memory. In one embodiment, a compute element disables caching of some specific addresses in a non-cache memory, but still enables caching of other addresses in the non-cache memory, thereby practically disabling the DDIO system, so that data sets not currently needed are placed in the addresses in the non-cache memory which are not cached. As a result, currently-required data are not shifted out of cache memory. The compute element then determines that the data sets, which formerly avoided being cached, are now required. The system therefore copies the data sets that are now required from addresses in non-cache memory not accessible to cache memory, to addresses in non-cache memory accessible to cache memory, thereby allowing the caching and processing of such data sets.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: May 2, 2017
    Assignee: Parallel Machines Ltd.
    Inventors: Michael Adda, Avner Braverman, Lior Amar, Dan Aloni, Lior Khermosh, Gal Zuckerman
  • Patent number: 9594696
    Abstract: Various systems and methods to generate automatically a procedure operative to distributively process a plurality of data sets stored on a plurality of memory modules. Under the instruction of the automatically generated procedure, compute elements request data sets relevant to a particular task, such data sets are fetched from memory modules by data interfaces which provide such data sets to the requesting compute elements, and the compute elements then process the received data sets until the task is completed. Relevant data sets are fetched and processed asynchronously, which means that the relevant data sets need not be fetched and processed in any particular order.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: March 14, 2017
    Assignee: Parallel Machines Ltd.
    Inventors: Avner Braverman, Michael Adda, Lior Amar, Lior Khermosh, Eli Finer, Gal Zuckerman
  • Patent number: 9594688
    Abstract: Described herein are systems and methods to execute efficiently a plurality of actions, in which multiple actions require the use of a single data set. The data set is fetched from a data source, across a switching network, to a memory associated with a first compute element. This is the only fetching of the data set from the data source, and the only fetching across a switching network, thereby minimizing fetching across the switching network, reducing the load on the switching network, decreasing the time by which the data set will be accessed in second and subsequent processes, and enhancing the efficiency of the system. In some embodiments, processes are migrated from second and subsequent compute elements to the compute element in which the data set is stored. In some embodiments, second and subsequent compute elements access the data set stored in the memory associated with the first compute element.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: March 14, 2017
    Assignee: Parallel Machines Ltd.
    Inventors: Michael Adda, Avner Braverman, Lior Amar, Lior Khermosh, Gal Zuckerman
  • Patent number: 9529622
    Abstract: Various systems and methods to generate automatically a procedure operative to divide a processing task between two or more compute elements. A first compute element converts a code sequence into a sequence of executable instructions, which direct a second compute element to perform a first processing sub-task on a data set, and which also direct a third compute element to perform a second processing sub-task on the data set modified by the first processing sub-task. A memory module storing the data set may be embedded in a server with at least one of the compute elements. In some of the embodiments, all of the compute elements are part of a single system, whereas in alternative embodiments, at least some of the compute elements are part of two or more sub-systems.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: December 27, 2016
    Assignee: Parallel Machines Ltd.
    Inventors: Michael Adda, Avner Braverman, Lior Amar, Lior Khermosh, Eli Finer, Gal Zuckerman
  • Patent number: 9477412
    Abstract: Described herein are various systems and methods to automatically decide to aggregate data write requests in a distributed data store. A system initiates outgoing data write requests in synchronization with incoming data store commands, thereby facilitating low-latency read-back of the data. In response to an absence of data read requests, the system automatically changes such that each request includes two or more data sets, thereby breaking synchronization but consequently reducing traffic load on a switching network within the system. If the system later detects data read requests for previously stored data, the system will automatically change back to the original synchronized state, thereby decreasing the latency of accessing stored data. The system alternates between the modes of operation to achieve balance between low latency of data access and reduced traffic load on the switching network.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: October 25, 2016
    Assignee: Parallel Machines Ltd.
    Inventors: Lior Amar, Gal Zuckerman, Avner Braverman, Lior Khermosh, Michael Adda