Patents by Inventor Liqi Wu
Liqi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240105444Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.Type: ApplicationFiled: April 26, 2023Publication date: March 28, 2024Inventors: Jiang LU, Liqi WU, Wei DOU, Weifeng YE, Shih Chung CHEN, Rongjun WANG, Xianmin TANG, Yiyang WAN, Shumao ZHANG, Jianqiu GUO
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Publication number: 20240052487Abstract: Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface are described. The methods include exposing the substrate surfaces to a blocking compound to selectively form a blocking layer on at least a portion of the first surface over the second surface. The substrate is sequentially exposed to a metal precursor with a kinetic diameter in excess of 21 angstroms and a reactant to selectively form a metal-containing layer on the second surface over the blocking layer or the first surface. The relatively larger metal precursors of some embodiments allow for the use of blocking layers with gaps or voids without the loss of selectivity.Type: ApplicationFiled: October 17, 2023Publication date: February 15, 2024Applicant: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Mark Saly, David Thompson, Tobin Kaufman-Osborn, Kurt Fredrickson, Thomas Knisley, Liqi Wu
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Publication number: 20240038859Abstract: A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a substrate; in the absence of an air break after the depositing of the metal silicide layer, preparing a metal cap layer directly on the metal silicide layer; and depositing a conductor on the metal cap layer.Type: ApplicationFiled: October 12, 2023Publication date: February 1, 2024Applicant: Applied Materials, Inc.Inventors: Bencherki Mebarki, Joung Joo Lee, Wenting Hou, Takashi Kuratomi, Avgerinos V. Gelatos, Jianxin Lei, Liqi Wu, Raymond Hoiman Hung, Tae Hong Ha, Xianmin Tang
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Publication number: 20230386833Abstract: Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch process. The resulting metal layer at the bottom of the feature facilitates selective metal gapfill of the feature.Type: ApplicationFiled: May 25, 2022Publication date: November 30, 2023Applicant: Applied Materials, Inc.Inventors: Liqi Wu, Feng Q. Liu, Bhaskar Jyoti Bhuyan, James Hugh Connolly, Zhimin Qi, Jie Zhang, Wei Dou, Aixi Zhang, Mark Saly, Jiang Lu, Rongjun Wang, David Thompson, Xianmin Tang
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Patent number: 11821085Abstract: Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface are described. The methods include exposing the substrate surfaces to a blocking compound to selectively form a blocking layer on at least a portion of the first surface over the second surface. The substrate is sequentially exposed to a metal precursor with a kinetic diameter in excess of 21 angstroms and a reactant to selectively form a metal-containing layer on the second surface over the blocking layer or the first surface. The relatively larger metal precursors of some embodiments allow for the use of blocking layers with gaps or voids without the loss of selectivity.Type: GrantFiled: February 23, 2021Date of Patent: November 21, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Bhaskar Jyoti Bhuyan, Mark Saly, David Thompson, Tobin Kaufman-Osborn, Kurt Fredrickson, Thomas Knisley, Liqi Wu
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Publication number: 20230343643Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.Type: ApplicationFiled: July 19, 2022Publication date: October 26, 2023Inventors: Chih-Hsun HSU, Shiyu YUE, Wei LEI, Yi XU, Jiang LU, Yu LEI, Ziye XIONG, Tsung-Han YANG, Zhimin QI, Aixi ZHANG, Jie ZHANG, Liqi WU, Rongjun WANG, Shihchung CHEN, Meng-Shan WU, Chun-Chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG, Xianmin TANG
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Publication number: 20230326744Abstract: Embodiments of the disclosure relate to methods for bottom-up metal gapfill without substantial deposition outside of the feature. Additional embodiments provide a method of forming a metal material on the top surface of the substrate and the bottom of the feature before depositing the metal gapfill.Type: ApplicationFiled: April 6, 2022Publication date: October 12, 2023Applicant: Applied Materials, Inc.Inventors: Annamalai Lakshmanan, Yixiong Yang, Srinivas Gandikota, Joung Joo Lee, Liqi Wu, Jie Zhang, Tuerxun Ailihumaer, Yogesh Sharma
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Patent number: 11735420Abstract: Methods of depositing a film selectively onto a first material relative to a second material are described. The substrate is pre-cleaned by heating the substrate to a first temperature, cleaning contaminants from the substrate and activating the first surface to promote formation of a self-assembled monolayer (SAM) on the first material. A SAM is formed on the first material by repeated cycles of SAM molecule exposure, heating and reactivation of the first material. A final exposure to the SAM molecules is performed prior to selectively depositing a film on the second material. Apparatus to perform the selective deposition are also described.Type: GrantFiled: September 8, 2020Date of Patent: August 22, 2023Assignee: Applied Materials, Inc.Inventors: Chang Ke, Lei Zhou, Biao Liu, Cheng Pan, Yuanhong Guo, Liqi Wu, Michael S. Jackson, Ludovic Godet, Tobin Kaufman-Osborn, Erica Chen, Paul F. Ma
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Publication number: 20230187282Abstract: Methods for forming a semiconductor structure and semiconductor structures are described. The method comprises patterning a substrate to form a first opening and a second opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor and the second opening over the p transistor. The substrate may be pre-cleaned. A ruthenium silicide (RuSi) layer is selectively deposited on the p transistor. A titanium silicide (TiSi) layer is formed on the n transistor and the p transistor. An optional barrier layer may be formed on the titanium silicide (TiSi) layer. The method may be performed in a processing chamber without breaking vacuum.Type: ApplicationFiled: December 15, 2021Publication date: June 15, 2023Applicant: Applied Materials, Inc.Inventors: Thomas Anthony Empante, Avgerinos V. Gelatos, Zhibo Yuan, Liqi Wu, Joung Joo Lee, Byunghoon Yoon
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Patent number: 11515155Abstract: Methods of improved selectively for SAM-based selective depositions are described. Some of the methods include forming a SAM on a second surface and a carbonized layer on the first surface. The substrate is exposed to an oxygenating agent to remove the carbonized layer from the first surface, and a film is deposited on the first surface over the protected second surface. Some of the methods include overdosing a SAM molecule to form a SAM layer and SAM agglomerates, depositing a film, removing the agglomerates, reforming the SAM layer and redepositing the film.Type: GrantFiled: March 10, 2021Date of Patent: November 29, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Chang Ke, Michael S. Jackson, Liqi Wu, Lei Zhou, Shuyi Zhang, David Thompson, Paul F. Ma, Biao Liu, Cheng Pan
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Publication number: 20220359279Abstract: Embodiments herein are generally directed to methods of forming high aspect ratio metal contacts and/or interconnect features, e.g., tungsten features, in a semiconductor device. Often, conformal deposition of tungsten in a high aspect ratio opening results in a seam and/or void where the outward growth of tungsten from one or more walls of the opening meet. Thus, the methods set forth herein provide for a desirable bottom up tungsten bulk fill to avoid the formation of seams and/or voids in the resulting interconnect features, and provide an improved contact metal structure and method of forming the same. In some embodiments, an improved overburden layer or overburden layer structure is formed over the field region of the substrate to enable the formation of a contact or interconnect structure that has improved characteristics over conventionally formed contacts or interconnect structures.Type: ApplicationFiled: May 10, 2021Publication date: November 10, 2022Inventors: Xi CEN, Mingrui ZHAO, Peiqi WANG, Wei Min CHAN, Kai WU, Yi LUO, Liqi WU
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Publication number: 20220325410Abstract: Methods of depositing a metal film are discussed. A metal film is formed on the bottom of feature having a metal bottom and dielectric sidewalls. Formation of the metal film comprises exposure to a metal precursor and an alkyl halide catalyst while the substrate is maintained at a deposition temperature. The metal precursor has a decomposition temperature above the deposition temperature. The alkyl halide comprises carbon and halogen, and the halogen comprises bromine or iodine.Type: ApplicationFiled: June 23, 2022Publication date: October 13, 2022Applicant: Applied Materials, Inc.Inventors: Byunghoon Yoon, Liqi Wu, Joung Joo Lee, Kai Wu, Xi Cen, Wei Lei, Sang Ho Yu, Seshadri Ganguli
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Patent number: 11450525Abstract: Methods of depositing films are described. Specifically, methods of depositing metal oxide films are described. A metal oxide film is selectively deposited on a metal layer relative to a dielectric layer by exposing a substrate to an organometallic precursor followed by exposure to an oxidant.Type: GrantFiled: September 14, 2018Date of Patent: September 20, 2022Assignee: Applied Materials, Inc.Inventors: Liqi Wu, Hung Nguyen, Bhaskar Jyoti Bhuyan, Mark Saly, Feng Q. Liu, David Thompson
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Patent number: 11421318Abstract: Methods and apparatus for increasing reflectivity of an aluminum layer on a substrate. In some embodiments, a method of depositing an aluminum layer on a substrate comprises depositing a layer of cobalt or cobalt alloy or a layer of titanium or titanium alloy on the substrate with a chemical vapor deposition (CVD) process, pre-treating the layer of cobalt or cobalt alloy with a thermal hydrogen anneal at a temperature of approximately 400 degrees Celsius if a top surface of the layer of cobalt or cobalt alloy is compromised, and depositing a layer of aluminum on the layer of cobalt or cobalt alloy or the layer of titanium or titanium alloy with a CVD process at a temperature of approximately 120 degrees Celsius. Pre-treatment of the layer of cobalt or cobalt alloy may be accomplished for a duration of approximately 60 seconds to approximately 120 seconds.Type: GrantFiled: April 30, 2019Date of Patent: August 23, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Jacqueline Wrench, Liqi Wu, Hsiang Ning Wu, Paul Ma, Sang-Ho Yu, Fuqun Grace Vasiknanonte, Nobuyuki Sasaki
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Publication number: 20220231137Abstract: A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a substrate; in the absence of an air break after the depositing of the metal silicide layer, preparing a metal cap layer directly on the metal silicide layer; and depositing a conductor on the metal cap layer.Type: ApplicationFiled: January 19, 2021Publication date: July 21, 2022Applicant: Applied Materials, Inc.Inventors: Bencherki Mebarki, Joung Joo Lee, Wenting Hou, Takashi Kuratomi, Avgerinos V. Gelatos, Jianxin Lei, Liqi Wu, Raymond Hoiman Hung, Tae Hong Ha, Xianmin Tang
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Publication number: 20220223472Abstract: A method for forming conductive structures for a semiconductor device includes depositing a reflow material in features, e.g. vias, formed in a dielectric layer. A high melting point material is deposited in the feature and is reflowed and annealed in an ambient comprising one or more of hydrogen molecules, hydrogen ions, and hydrogen radicals at a temperature greater than 300° C. to fill the feature with a reflow material.Type: ApplicationFiled: January 11, 2021Publication date: July 14, 2022Applicant: Applied Materials, Inc.Inventors: Yi Luo, Rong Tao, Liqi Wu, Mingte Liu, Joung Joo Lee, Avgerinos V. Gelatos
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Publication number: 20210285102Abstract: Methods of depositing a metal film are discussed. A metal film is formed on the bottom of feature having a metal bottom and dielectric sidewalls. Formation of the metal film comprises exposure to a metal precursor and an alkyl halide catalyst while the substrate is maintained at a deposition temperature. The metal precursor has a decomposition temperature above the deposition temperature. The alkyl halide comprises carbon and halogen, and the halogen comprises bromine or iodine.Type: ApplicationFiled: March 11, 2021Publication date: September 16, 2021Applicant: Applied Materials, Inc.Inventors: Byunghoon Yoon, Liqi Wu, Joung Joo Lee, Kai Wu, Xi Cen, Wei Lei, Sang Ho Yu, Seshadri Ganguli
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Publication number: 20210283650Abstract: Methods and apparatus for removing deposits in self-assembled monolayer (SAM) based selective deposition process schemes using cryogenic gas streams are described. Some methods include removing deposits in self-assembled monolayer (SAM) based selective depositions by exposing the substrate to cryogenic aerosols to remove undesired deposition on SAM protected surfaces. Processing chambers for cryogenic gas assisted selective deposition are also described.Type: ApplicationFiled: June 1, 2021Publication date: September 16, 2021Applicant: Applied Materials, Inc.Inventors: Chang Ke, Song-Moon Suh, Liqi Wu, Michael S. Jackson, Lei Zhou, Biao Liu, Cheng Pan, Paul F. Ma, Mei Chang
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Patent number: 11075276Abstract: Methods and apparatus for forming a semiconductor structure such as an NMOS gate electrode are described. Methods may include depositing a first capping layer having a first surface atop a first surface of a high-k dielectric layer; and depositing at least one metal layer having a first surface atop the first surface of the first capping layer, wherein the at least one metal layer includes titanium aluminum silicide material. Some methods include removing an oxide layer from the first surface of the first capping layer by contacting the first capping layer with metal chloride in an amount sufficient to remove an oxide layer. Some methods for depositing a titanium aluminum silicide material are performed by an atomic layer deposition process performed at a temperature of 350 to 400 degrees Celsius.Type: GrantFiled: October 7, 2019Date of Patent: July 27, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Yongjing Lin, Shih Chung Chen, Naomi Yoshida, Lin Dong, Liqi Wu, Rongjun Wang, Steven Hung, Karla Bernal Ramos, Yixiong Yang, Wei Tang, Sang-Ho Yu
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Publication number: 20210217615Abstract: Methods of improved selectively for SAM-based selective depositions are described. Some of the methods include forming a SAM on a second surface and a carbonized layer on the first surface. The substrate is exposed to an oxygenating agent to remove the carbonized layer from the first surface, and a film is deposited on the first surface over the protected second surface. Some of the methods include overdosing a SAM molecule to form a SAM layer and SAM agglomerates, depositing a film, removing the agglomerates, reforming the SAM layer and redepositing the film.Type: ApplicationFiled: March 10, 2021Publication date: July 15, 2021Applicant: Applied Materials, Inc.Inventors: Chang Ke, Michael S. Jackson, Liqi Wu, Lei Zhou, Shuyi Zhang, David Thompson, Paul F. Ma, Biao Liu, Cheng Pan