Patents by Inventor Liqin Jiu

Liqin Jiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Symmetric quadrupole structured field emission display without spacer
    Patent number: 8803413
    Abstract: The present invention relates to a symmetric quadrupole structured field emission display without spacer comprising the upper and under substrates with a dielectric layer in between, wherein comb-like dielectric layer with lateral connection belts and a number of longitudinal working belts and longitudinal anodes are arranged on the upper substrate, bus electrodes are arranged longitudinally along the center on each anode, on the top, longitudinal alternating phosphor layer and dielectric layer for isolation on anode, gate electrodes are arranged on both sides of each longitudinal work belts, with the bus electrode as symmetry center, forming interdigital gate electrodes, horizontal cathode electrodes and longitudinal auxiliary electrodes are on the under substrate, resistor layer for current limiting and dielectric layer for cathode protection are arranged alternating horizontally on each cathode electrode, each intersect of the auxiliary electrode and cathode is isolated by the dielectric layer for cathode.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: August 12, 2014
    Inventors: Tailiang Guo, Yun Ye, Zhixian Lin, Yongai Zhang, Liqin Jiu, Yuxiang You
  • symmetric quadrupole structured field emission display without spacer
    Publication number: 20140111083
    Abstract: The present invention relates to a symmetric quadrupole structured field emission display without spacer comprising the upper and under substrates with a dielectric layer in between, wherein comb-like dielectric layer with lateral connection belts and a number of longitudinal working belts and longitudinal anodes are arranged on the upper substrate, bus electrodes are arranged longitudinally along the center on each anode, on the top, longitudinal alternating phosphor layer and dielectric layer for isolation on anode, gate electrodes are arranged on both sides of each longitudinal work belts, with the bus electrode as symmetry center, forming interdigital gate electrodes, horizontal cathode electrodes and longitudinal auxiliary electrodes are on the under substrate, resistor layer for current limiting and dielectric layer for cathode protection are arranged alternating horizontally on each cathode electrode, each intersect of the auxiliary electrode and cathode is isolated by the dielectric layer for cathode
    Type: Application
    Filed: August 12, 2011
    Publication date: April 24, 2014
    Inventors: Tailiang Guo, Yun Ye, Zhixian Lin, Yongai Zhang, Liqin Jiu, Yuxiang You