Patents by Inventor Lisa B. Johanson

Lisa B. Johanson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5524007
    Abstract: An improved network interface architecture for a packet switch provides for the combination of both voice and data in a single switch using a common packet structure. It allows for the dynamic allocation of bandwidth based on system loading. This includes not only bandwidth within the voice or data areas of the frame, but also between the voice and data portions. The network interface (NI) provides a mechanism (the NI-Bus) of passing all packets through the Network Interface or allowing the packet devices to directly transfer packets between one another. The bandwidth allocation can easily be changed because the control and data memories are synchronized to one another. The network interface architecture, according to the invention, allows for the data packets and the control of bandwidth allocation to be controlled by a single switching device. It synchronizes the transfer of the data and the allocation of bus bandwidth.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: June 4, 1996
    Assignee: Motorola, Inc.
    Inventors: Richard E. White, Dale R. Buchholz, Thomas A. Freeburg, Lisa B. Johanson
  • Patent number: 5517500
    Abstract: An improved network interface architecture for a packet switch provides for the combination of both voice and data in a single switch using a common packet structure. It allows for the dynamic allocation of bandwidth based on system loading. This includes not only bandwidth within the voice or data areas of the frame, but also between the voice and data portions. The network interface (NI) provides a method (the NI-Bus) or passing all packets through the Network Interface or allowing the packet devices to directly transfer packets between one another. The bandwidth allocation can easily be changed because the control and data memories are synchronized to one another. The network interface architecture, according to the invention, allows for the data packets and the control of bandwidth allocation to be controlled by a single switching device. It synchronizes the transfer of the data and the allocation of bus bandwidth.
    Type: Grant
    Filed: June 21, 1993
    Date of Patent: May 14, 1996
    Assignee: Motorola, Inc.
    Inventors: Richard E. White, Dale R. Buchhlz, Thomas A. Freeburg, Lisa B. Johanson
  • Patent number: 5477541
    Abstract: A hierarchical addressing technique is employed in a packet communications system to enhance flexibility in storing and referencing packet information. This method permits packet message data and certain packet control data to be stored in memory locations without having to be duplicated at a different memory location prior to transmission of the packet. This method is preferably employed in a ring configuration in which a series of packets have addressing mechanisms which points sequentially to each other to form a ring of packets received or to be transmitted.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: December 19, 1995
    Inventors: Richard E. White, Dale R. Buchholz, Thomas A. Freeburg, Hungkun J. Chang, Michael P. Nolan, John M. Kaczmarczyk, Lisa B. Johanson