Abstract: A system-on-chip (SoC) method and apparatus are disclosed for checking end-to-end integrity of communications over an network interconnect, where the SoC includes an initiator subsystem connected over the network interconnect to a target subsystem, wherein a first integrity module is configured to compute a first integrity value based on regular transaction messages sent or received by the initiator subsystem and to send a protecting information transaction (PIT) message over the network interconnect to the target subsystem, wherein a second integrity module is configured to compute a second integrity value based on regular transaction messages sent or received by the destination subsystem and to send a PIT response message over the network interconnect to the initiator subsystem, and wherein a compatibility module compares the first and second integrity values to verify the end-to-end integrity of the regular transaction messages sent or received over the network interconnect.

Abstract: A system on a chip allows external NorFlash memory sharing by multiple master devices. The system on a chip is configured to use an external NorFlash memory and includes a plurality of master devices and NorFlash virtualising circuity. The NorFlash virtualizing circuitry is configured to suspend a program operation or an erase operation being carried out on the external NorFlash memory, permit a read operation to be carried out on the NorFlash memory and then resume the suspended program operation or erase operation. Each master device of the plurality of master devices operates as a master to independently access the external NorFlash memory.

Abstract: A system on a chip allows external NorFlash memory sharing by multiple master devices. The system on a chip is configured to use an external NorFlash memory and includes a plurality of master devices and NorFlash virtualising circuity. The NorFlash virtualizing circuitry is configured to suspend a program operation or an erase operation being carried out on the external NorFlash memory, permit a read operation to be carried out on the NorFlash memory and then resume the suspended program operation or erase operation. Each master device of the plurality of master devices operates as a master to independently access the external NorFlash memory.