Abstract: Certain embodiments of the present invention include a versatile and scalable process, “patterned regrowth,” that allows for the spatially controlled synthesis of lateral junctions between electrically conductive graphene and insulating h-BN, as well as between intrinsic and substitutionally doped graphene. The resulting films form mechanically continuous sheets across these heterojunctions. These embodiments represent an element of developing atomically thin integrated circuitry and enable the fabrication of electrically isolated active and passive elements embedded in continuous, one atom thick sheets, which may be manipulated and stacked to form complex devices at the ultimate thickness limit.

Abstract: A method of manufacturing one or more graphene devices is disclosed. A thin film growth substrate is formed directly on a device substrate. Graphene is formed on the thin film growth substrate. A transistor is also disclosed, having a device substrate and a source supported by the device substrate. The transistor also has a drain separated from the source and supported by the device substrate. The transistor further has a single layer graphene (SLG) channel grown partially on and coupling the source and the drain. The transistor also has a gate aligned with the SLG channel, and a gate insulator between the gate and the SLG channel. Integrated circuits and other apparati having a device substrate, a thin film growth substrate formed directly on at least a portion of the device substrate, and graphene formed directly on at least a portion of the thin film growth substrate are also disclosed.

Abstract: Certain embodiments of the present invention include a versatile and scalable process, “patterned regrowth,” that allows for the spatially controlled synthesis of lateral junctions between electrically conductive graphene and insulating h-BN, as well as between intrinsic and substitutionally doped graphene. The resulting films form mechanically continuous sheets across these heterojunctions. These embodiments represent an element of developing atomically thin integrated circuitry and enable the fabrication of electrically isolated active and passive elements embedded in continuous, one atom thick sheets, which may be manipulated and stacked to form complex devices at the ultimate thickness limit.

Abstract: Certain embodiments of the present invention include a versatile and scalable process, “patterned regrowth,” that allows for the spatially controlled synthesis of lateral junctions between electrically conductive graphene and insulating h-BN, as well as between intrinsic and substitutionally doped graphene. The resulting films form mechanically continuous sheets across these heterojunctions. These embodiments represent an element of developing atomically thin integrated circuitry and enable the fabrication of electrically isolated active and passive elements embedded in continuous, one atom thick sheets, which may be manipulated and stacked to form complex devices at the ultimate thickness limit.

Abstract: Certain embodiments of the present invention include a versatile and scalable process, “patterned regrowth,” that allows for the spatially controlled synthesis of lateral junctions between electrically conductive graphene and insulating h-BN, as well as between intrinsic and substitutionally doped graphene. The resulting films form mechanically continuous sheets across these heterojunctions. These embodiments represent an element of developing atomically thin integrated circuitry and enable the fabrication of electrically isolated active and passive elements embedded in continuous, one atom thick sheets, which may be manipulated and stacked to form complex devices at the ultimate thickness limit.

Abstract: A method of manufacturing one or more graphene devices is disclosed. A thin film growth substrate is formed directly on a device substrate. Graphene is formed on the thin film growth substrate. A transistor is also disclosed, having a device substrate and a source supported by the device substrate. The transistor also has a drain separated from the source and supported by the device substrate. The transistor further has a single layer graphene (SLG) channel grown partially on and coupling the source and the drain. The transistor also has a gate aligned with the SLG channel, and a gate insulator between the gate and the SLG channel. Integrated circuits and other apparati having a device substrate, a thin film growth substrate formed directly on at least a portion of the device substrate, and graphene formed directly on at least a portion of the thin film growth substrate are also disclosed.