Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.

Abstract: The present application provides a touch driving circuit, a driving chip and a touch display device.

Abstract: The present disclosure is generally directed to compositions that include antibodies, e.g., monoclonal antibodies, humanized antibodies and antibody fragments, that specifically bind a MS4A4A polypeptide, e.g., a mammalian MS4A4A or human MS4A4A, and use of such compositions in preventing, reducing risk, or treating an individual in need thereof.

Abstract: A multibeam antenna including a substrate, and further includes an antenna element, a first guiding apparatus, and a second guiding apparatus disposed on the substrate. The antenna element includes a first pole configured to receive a feeding signal and a second pole that is grounded. The first guiding apparatus enables a first beam generated by the antenna element to radiate in a first direction, and the second guiding apparatus enables a second beam generated by the antenna element to radiate in a second direction. A phase center of the antenna element is at an intersecting point of a first axis and a second axis, the first axis passing through a phase center of the first guiding apparatus and parallel to the first direction, and the second axis passing through a phase center of the second guiding apparatus and parallel to the second direction.

Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.

Abstract: An electronic device may include wireless circuitry with processor circuitry, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as low noise amplifier circuitry for amplifying received radio-frequency signals. The amplifier circuitry may include an amplifier having an input and an output, an adjustable load component coupled to the input, and an adjustable feedback component coupled across the input and output. A control circuit may simultaneously adjust the load and feedback components to tune the gain of the amplifier circuitry while maintaining the input resistance at a desired target level. The load and feedback components can be the same or different types of adjustable passive components.

Abstract: An electronic device may include wireless circuitry with processor circuitry, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as low noise amplifier circuitry for amplifying received radio-frequency signals. The amplifier circuitry may include an amplifier having an input and an output, an adjustable load component coupled to the input, and an adjustable feedback component coupled across the input and output. A control circuit may simultaneously adjust the load and feedback components to tune the gain of the amplifier circuitry while maintaining the input resistance at a desired target level. The load and feedback components can be the same or different types of adjustable passive components.

Abstract: A multibeam antenna including a substrate, and further includes an antenna element, a first guiding apparatus, and a second guiding apparatus disposed on the substrate. The antenna element includes a first pole configured to receive a feeding signal and a second pole that is grounded. The first guiding apparatus enables a first beam generated by the antenna element to radiate in a first direction, and the second guiding apparatus enables a second beam generated by the antenna element to radiate in a second direction. A phase center of the antenna element is at an intersecting point of a first axis and a second axis, the first axis passing through a phase center of the first guiding apparatus and parallel to the first direction, and the second axis passing through a phase center of the second guiding apparatus and parallel to the second direction.

Abstract: This application provides implementations related to lenses. In one implementation, a lens comprises a substrate layer and a metal layer, wherein at least one surface of the substrate layer is a concave surface or a convex surface; the metal layer exists on the at least one surface of the substrate layer; the metal layer comprises a metal part and a hollow-out part, and the metal part or the hollow-out part is presented by using a graphics array; the graphics array comprises a plurality of first rings, the first ring comprises a plurality of graphic units, and a larger ring encircles a smaller ring in the plurality of first rings; and at least one of the following are different: size of graphic units comprised in two adjacent first rings, rotation angle of graphic units comprised in two adjacent first rings, or two adjacent first intervals, wherein the first interval is an interval between the two adjacent first rings.

Abstract: A computer system may periodically calibrate an oscillator subsystem, which includes a voltage-controlled oscillator circuit configured to generate an oscillator signal using code signal. In response to activation of a calibration mode, an iterative calibration operation may be performed on the voltage-controlled oscillator circuit. In some cases, performing a given iteration of the calibration operation includes determining a value of the code signal using a number of pulses in the oscillator signal sampled during a particular time period, along with previous values of the code signal and a slope of an error function associated with the difference between a desired frequency and a current frequency of the oscillator signal. In other cases, iterations may employ variable sampling times with error handling, in order to decrease the duration of the calibration operation while maintaining a target accuracy.

Abstract: A computer system may periodically calibrate an oscillator subsystem, which includes a voltage-controlled oscillator circuit configured to generate an oscillator signal using code signal. In response to activation of a calibration mode, an iterative calibration operation may be performed on the voltage-controlled oscillator circuit. In some cases, performing a given iteration of the calibration operation includes determining a value of the code signal using a number of pulses in the oscillator signal sampled during a particular time period, along with previous values of the code signal and a slope of an error function associated with the difference between a desired frequency and a current frequency of the oscillator signal. In other cases, iterations may employ variable sampling times with error handling, in order to decrease the duration of the calibration operation while maintaining a target accuracy.

Abstract: This application provides implementations related to lenses. In one implementation, a lens comprises a substrate layer and a metal layer, wherein at least one surface of the substrate layer is a concave surface or a convex surface; the metal layer exists on the at least one surface of the substrate layer; the metal layer comprises a metal part and a hollow-out part, and the metal part or the hollow-out part is presented by using a graphics array; the graphics array comprises a plurality of first rings, the first ring comprises a plurality of graphic units, and a larger ring encircles a smaller ring in the plurality of first rings; and at least one of the following are different: size of graphic units comprised in two adjacent first rings, rotation angle of graphic units comprised in two adjacent first rings, or two adjacent first intervals, wherein the first interval is an interval between the two adjacent first rings.

Abstract: Method and system are provided for automated partitioning of transportation routing problems. The method includes: determining a threshold number of shipments per partition; selecting a geographic center; mapping delivery and/or pickup sites at geographic locations; scanning radially around the geographic center to determine the sparsest or densest region of sites and selecting a starting point in this region; and progressing from the starting point radially around the geographic center aggregating sites into partitions with a maximum of the threshold number of shipments in a partition. The method may include: solving each partitioned instance of a problem to generate one or more optimized routes; and creating a union of all the instances solutions.

Abstract: An embodiment includes a first feedback tap, a second feedback tap, and a summation circuit. The summation circuit may include a first load and a second load coupled to each other at an internal circuit node, and coupled in series between a power supply node and an output node. The summation circuit may be configured to receive, via a serial communication link, an input signal indicative of a series of data symbols, and to generate an output voltage level on the output node based upon a current data symbol. The first feedback tap, coupled to the output node, may be configured to sink a first current from the output node based upon a first previously received data symbol. The second feedback tap, coupled to an intermediate circuit node, may be configured to sink a second current from the intermediate circuit node based upon a second previously received data symbol.

Abstract: Embodiments include systems and methods for on-chip random jitter (RJ) measurement in a clocking circuit (e.g., in a phase-locked loop of a serializer/deserializer circuit). Some embodiments determine a reference delay code sweep window to capture at least a candidate RJ range of a feedback clock signal, the reference delay code sweep window comprising a sequence of reference delay codes. A distribution of one-scores can be computed over the reference delay code sweep window, so that the distribution indicates a relatively likelihood, for each reference delay code, of obtaining a ‘1’ sample when sampling the feedback clock signal according to the delayed clock signal (delayed by an amount according to the reference delay code). The distribution can be transformed into a time domain by computing code offset times for the reference delay codes. A RJ output can be computed as a function of the distribution in the time domain.