Patents by Inventor Long Lu

Long Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170204
    Abstract: A magnetic device includes a base plate, a cover plate, a first winding column, a second winding column, a primary winding, a secondary winding and a supporting column. The base plate, having a first concave portion, is opposite to the cover plate. The first winding column and the second winding column are disposed between the bottom plate and the cover plate, respectively. The primary winding and the secondary winding are wound around the first winding column and the second winding column. The supporting column is disposed between the base plate and the cover plate. A first concave portion concaves from a first side of the base plate towards the first winding column and the second winding column along multiple directions. The primary winding and the secondary winding are wound and stacking along an extension direction of the first winding column and the second winding column.
    Type: Application
    Filed: July 20, 2023
    Publication date: May 23, 2024
    Inventors: Chen CHEN, De-Jia LU, Kai-De CHEN, Yong-Long SYU, Chao-Lin CHUNG
  • Publication number: 20240169924
    Abstract: The embodiments of the present disclosure provides a display substrate, including: an active region and a peripheral region, the active region is provided therein with a plurality of pixel units arranged in an array, all the pixel units are divided into n pixel unit groups, the peripheral region is provided therein with a driver block including a first gate drive circuit having n+x first signal output terminals configured to sequentially output first gate drive signals in an active level and the first gate line provided for an ith pixel unit group is electrically connected to a (i+x)th first signal output terminal, and the reset signal line provided for the ith pixel unit group is electrically connected to an ith first signal output terminal, with i being a positive integer and i?n.
    Type: Application
    Filed: June 18, 2021
    Publication date: May 23, 2024
    Inventors: Guangliang SHANG, Libin LIU, Mengyang WEN, Jiangnan LU, Li WANG, Long HAN
  • Publication number: 20240161669
    Abstract: A display substrate and a display device are provided. The display substrate includes a shift register unit, a first clock signal line and a first power line, the shift register unit includes a charge pump circuit, and the charge pump circuit includes a first capacitor, a first transistor and a second capacitor. The charge pump circuit is electrically connected with a first input node and a first node, respectively. A first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a first electrode plate of the second capacitor is connected with the first power line, a second electrode plate of the second capacitor is connected with the first node, a gate electrode of the first transistor is connected with a first electrode or a second electrode of the first transistor.
    Type: Application
    Filed: March 24, 2021
    Publication date: May 16, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jiangnan Lu, Guangliang Shang, Libin Liu, Long Han, Yu Feng
  • Publication number: 20240153962
    Abstract: Embodiments of the disclosure disclose a display substrate, a manufacturing method thereof and a display apparatus. The display substrate includes: a base, having a wire routing region; a first wire routing layer, located on the base, where the first wire routing layer in the wire routing region includes a plurality of first routing wires arranged at intervals, and a space between adjacent first routing wires is smaller than 2 um; an insulation layer, located on a side of the first wire routing layer facing away from the base and having a plurality of first via holes corresponding to the first routing wires; a first flat layer, located on a side of the insulation layer facing away from the base and having second via holes corresponding to the first via holes, where the second via holes at least partially overlap with the first via holes.
    Type: Application
    Filed: April 29, 2021
    Publication date: May 9, 2024
    Inventors: Liang SONG, Long JIANG, Mingwen WANG, Pengyu LIAO, Zhong LU, Yuanjie XU, Benlian WANG, Lili DU, Donghua JIANG
  • Publication number: 20240128692
    Abstract: The utility model relates to a grounded shrapnel structure of an H-MTD male connector, including a housing of a hollow structure, a shrapnel in an arch shape, and a guide block. The front end of the housing is provided with an opening. The guide block is arranged horizontally. One end of the guide block is connected to one end of the opening. The other end of the guide block is connected to one end of the shrapnel. The structure uses only two surfaces at top and bottom that are grounded, thereby reducing the number of openings, improving the strength of a sidewall, and enhancing the shielding effect. In addition, the guide block can play the function of anti-scratching during assembly, which can effectively avoid the damage to the shrapnel during assembly and improve yield.
    Type: Application
    Filed: June 16, 2023
    Publication date: April 18, 2024
    Inventors: Long Bai, Haiqiu Lu, Xiaoan Wang, Qi Peng
  • Publication number: 20240128688
    Abstract: The utility model relates to a ring-shaped shrapnel structure of an H-MTD male connector, including a housing, a ring-shaped sheet, and a shrapnel. The housing is a stepped hollow structure. The ring-shaped sheet is connected to the front end of the housing. The shrapnel in an arch-shape protrudes and is arranged on the ring-shaped sheet. The structure uses a split design to separate the shrapnel from the housing, thereby reducing production difficulties and improving yields, while complementing the shielding effect of the connector.
    Type: Application
    Filed: June 16, 2023
    Publication date: April 18, 2024
    Inventors: Long Bai, Haiqiu Lu, Xiaoan Wang, Qi Peng
  • Publication number: 20240128565
    Abstract: A battery pack, a vehicle, and an energy storage device are provided. The battery pack includes a cell array and a support member, where the cell array includes a plurality of cells, the cell has a first dimension, and the first dimension is a maximum spacing between two imaginary parallel planes sandwiching the cell; and at least one of the cells 600 mm?first dimension?2500 mm the at least one cell includes a casing and a core located inside the casing, a supporting region is formed on the casing, and the cell is connected to the support member through the supporting region and is supported by the support member. The support member is connected to the supporting region to support the cell.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: BYD COMPANY LIMITED
    Inventors: Long HE, Huajun SUN, Wenfeng JIANG, Zhipei LU, Weixin ZHENG, Jianglong TANG, Yan ZHU, Xinyue WANG, Kefeng HE
  • Patent number: 11955651
    Abstract: A power battery pack includes: a pack body; a plurality of cells, disposed in the pack body; the cell having a length L0, a width H0, and a thickness D0, where at least one cell meets: L0>H0?D0, a length direction of the cell is arranged along a width direction of a vehicle body of the electric vehicle, and in the width direction of the electric vehicle, the length L0 of the cell and a size W of the vehicle body of the electric vehicle in the width direction meet: 46%?L0/W?76%; or at least one cell meets: L0>H0?D0, a length direction of the cell is arranged along a length direction of a vehicle body of the electric vehicle, and in the length direction of the electric vehicle, the length L0 of the cell and a size X of the vehicle body of the electric vehicle in the length direction meet: 40%?L0/W?76%.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: April 9, 2024
    Assignee: BYD COMPANY LIMITED
    Inventors: Long He, Huajun Sun, Wenfeng Jiang, Zhipei Lu, Weixin Zheng, Jianglong Tang, Yan Zhu, Xinyue Wang, Kefeng He
  • Patent number: 11931371
    Abstract: The present invention provides compositions and methods of their use in treating muscular dystrophy and other disorders.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: March 19, 2024
    Assignee: The Charlotte Mecklenburg Hospital Authority
    Inventors: Qi Long Lu, Marcela Cataldi, Pei Juan Lu
  • Publication number: 20240087799
    Abstract: An inductor device including a frame portion, a first winding set, a second winding set and a first common magnetic core I piece is provided. The first winding set, the second winding set and the first common magnetic core I piece are disposed in the frame portion. The first common magnetic core I piece substantially connects the first winding set and the second winding set and the frame portion. The material of the two winding sets is different from that of the first common magnetic core I piece.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 14, 2024
    Inventors: Kai-De CHEN, Yong-Long SYU, Chen CHEN, De-Jia LU, Chao-Lin CHUNG
  • Publication number: 20240071451
    Abstract: The three-state spintronic device includes: a bottom electrode, a magnetic tunnel junction and a top electrode from bottom to top. The magnetic tunnel junction includes: a spin-orbit coupling layer, a ferromagnetic free layer, a barrier tunneling layer, a ferromagnetic reference layer, three local magnetic domain wall pinning centers and domain wall nucleation centers. An antisymmetric exchange interaction is modulated, and the magnetic domain wall pinning centers are embedded in an interface between a heavy metal and the ferromagnetic free layer. The magnetic domain wall nucleation centers are at two ends of the ferromagnetic free layer. A current pulse flows through the spin-orbit coupling layer to generate a spin current and the spin current is injected into the ferromagnetic free layer. Under a control of all-electrical controlled, an effective field of a spin-orbit torque drives domain wall to move and displace.
    Type: Application
    Filed: January 21, 2021
    Publication date: February 29, 2024
    Inventors: Huai LIN, Guozhong XING, Zuheng WU, Long LIU, Di WANG, Cheng LU, Peiwen ZHANG, Changqing XIE, Ling LI, Ming LIU
  • Publication number: 20240071312
    Abstract: A shift register circuit includes a first control sub-circuit and a first output sub-circuit. The first control sub-circuit is configured to: adjust a voltage of a first node to a turn-on voltage due to an influence of a first direct current voltage signal from a first clock signal terminal, an initial voltage signal from an initial signal terminal and a second direct current voltage signal from a second clock signal terminal; and maintain the voltage of the first node at the turn-on voltage due to an influence of a first clock signal from the first clock signal terminal and a second clock signal from the second clock signal terminal. The first output sub-circuit is configured to be turned on under a control of the turn-on voltage of the first node to transmit a first voltage signal from a first voltage terminal to a signal output terminal.
    Type: Application
    Filed: March 23, 2021
    Publication date: February 29, 2024
    Inventors: Guangliang SHANG, Jiangnan LU, Long HAN, Li WANG, Libin LIU, Xinshe YIN, Shiming SHI
  • Patent number: 11856856
    Abstract: A thermal conduction unit includes a conductive via, a periphery conductor and an isolation material. The conductive via includes a first thermoelectric material. The periphery conductor encloses the conductive via and includes a second thermoelectric material. An end of the periphery conductor is electrically connected to an end of the conductive via. The isolation material is interposed between the conductive via and the periphery conductor.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: December 26, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Publication number: 20230387046
    Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20230364118
    Abstract: Provided are methods of treating a disease or disorder in a subject in need thereof and associated compositions. An effective amount of ribitol is administered, thereby restoring and/or enhancing functional glycosylation of ?-DG and/or treating the disease or disorder.
    Type: Application
    Filed: September 9, 2021
    Publication date: November 16, 2023
    Inventors: Qi Long LU, Bo WU
  • Patent number: 11791227
    Abstract: An electronic device package and a method for manufacturing an electronic device package are provided. The electronic device package includes electronic device structure which includes a first electronic device and a first encapsulant, a second electronic device, and a second encapsulant. The first encapsulant encapsulates the first electronic device. The second electronic device is adjacent to the electronic device structure. The second encapsulant encapsulates the electronic device structure and the second electronic device. A first extension line along a lateral surface of the first electronic device and a second extension line along a lateral surface of the first encapsulant define a first angle, the second extension line along the lateral surface of the first encapsulant and a third extension line along a lateral surface of the second electronic device define a second angle, and the first angle is different from the second angle.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: October 17, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Kuoching Cheng, Yuan-Feng Chiang, Ya Fang Chan, Wen-Long Lu, Shih-Yu Wang
  • Patent number: 11721652
    Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: August 8, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11721645
    Abstract: A semiconductor package device includes a wiring structure, a semiconductor chip and an encapsulant. The semiconductor chip is electrically connected to the wiring structure. The encapsulant is disposed on the wiring structure and covers the semiconductor chip. A roughness (Ra) of a surface of the encapsulant is about 5 nm to about 50 nm.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: August 8, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11699682
    Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first module, a second module, a first intermediate circuit layer, a first conductive transmission path and a second conductive transmission path. The second module is stacked on the first module. The first intermediate circuit layer is arranged between the first module and the second module. The first conductive transmission is configured to electrically connect the first semiconductor module with the first intermediate circuit layer. The second conductive transmission path is configured to electrically connect the first intermediate circuit layer with the second semiconductor module.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: July 11, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11694984
    Abstract: A package structure includes a base material, at least one electronic device, at least one encapsulant and a plurality of dummy pillars. The electronic device is electrically connected to the base material. The encapsulant covers the electronic device. The dummy pillars are embedded in the encapsulant. At least two of the dummy pillars have different heights.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: July 4, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu