Abstract: The invention generally relates to semiconductor device processing, and more particularly to methods of accessing semiconductor circuits from the backside using ion-beam and gas-etch to mill deep vias through full-thickness silicon. A method includes creating a pocket in a material to be etched, and performing an isotropic etch of the material by flowing a reactive gas into the pocket and directing a focused ion beam into the pocket.

Abstract: Non-destructive, below-surface defect rendering of an IC chip using image intensity analysis is disclosed. One method includes providing an IC chip delayered to a selected layer; determining a defect location below a surface of the selected layer using a first image of the IC chip obtained using an CPIT in a first mode; generating a second image of the IC chip with the CPIT in a second mode, the second image representing charged particle signal from the defect below the surface of the selected layer; and rendering the defect by comparing an image intensity of a reference portion of the second image not including the defect with the image intensity of a defective portion of the second image including the defect, wherein the reference portion and the defective portion are of structures expected to be substantially identical.

Abstract: The invention generally relates to semiconductor device processing, and more particularly to methods of accessing semiconductor circuits from the backside using ion-beam and gas-etch to mill deep vias through full-thickness silicon. A method includes creating a pocket in a material to be etched, and performing an isotropic etch of the material by flowing a reactive gas into the pocket and directing a focused ion beam into the pocket.

Abstract: Non-destructive, below-surface defect rendering of an IC chip using image intensity analysis is disclosed. One method includes providing an IC chip delayered to a selected layer; determining a defect location below a surface of the selected layer using a first image of the IC chip obtained using an CPIT in a first mode; generating a second image of the IC chip with the CPIT in a second mode, the second image representing charged particle signal from the defect below the surface of the selected layer; and rendering the defect by comparing an image intensity of a reference portion of the second image not including the defect with the image intensity of a defective portion of the second image including the defect, wherein the reference portion and the defective portion are of structures expected to be substantially identical.