Patents by Inventor Louis B. Hobson

Louis B. Hobson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10768687
    Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: September 8, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Louis B. Hobson, Michael R. Durham, Robert S. Wright
  • Publication number: 20180275741
    Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.
    Type: Application
    Filed: June 1, 2018
    Publication date: September 27, 2018
    Inventors: Louis B. Hobson, Michael R. Durham, Robert S. Wright
  • Patent number: 10001831
    Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: June 19, 2018
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Louis B Hobson, Michael R Durham, Robert S Wright
  • Patent number: 9619015
    Abstract: Example embodiments disclosed herein relate to implementing a power down state in a computing device. A sleep command is issued to place a computing device in a sleep state in response to receipt of a power off command at the computing device. Content of memory of the computing device is written to non-volatile storage of the computing device and the computing device is placed in a power off state.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: April 11, 2017
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Louis B. Hobson
  • Patent number: 9483103
    Abstract: A computing machine to power a memory to retain a process state of the computing machine if the computing machine is in a sleep state and transfer the process state from the memory to a non-volatile storage device, where the computing machine remains in the sleep state as the process state is transferred from the memory to the non-volatile storage device.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: November 1, 2016
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Louis B. Hobson
  • Patent number: 9275527
    Abstract: A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: March 1, 2016
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mark D. Tupa, Michael R. Durham, Christopher Rijken, Louis B. Hobson, Joshua N. McMahon
  • Publication number: 20150323983
    Abstract: Example embodiments disclosed herein relate to implementing a power down state in a computing device. A sleep command is issued to place a computing device in a sleep state in response to receipt of a power off command at the computing device. Content of memory of the computing device is written to non-volatile storage of the computing device and the computing device is placed in a power off state.
    Type: Application
    Filed: July 27, 2012
    Publication date: November 12, 2015
    Inventor: Louis B. Hobson
  • Patent number: 9170632
    Abstract: An electronic device (100) includes a network interface controller (102) and an input/output controller (110, 202) having a link layer. A portion of the input/output controller is configured to be powered off during a lower power mode of the electronic device, where the first portion contains the link layer. Wakeup logic (108) separate from the input/output controller receives a wake indication from the network interface controller in response to the physical layer receiving a wake message on the network while the electronic device is in the lower power mode. The wakeup logic activates an indication to awaken the electronic device from the lower power mode in response to the wake indication from the network interface controller.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: October 27, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert C Brooks, Michael Richard Durham, Mark D Tupa, Louis B Hobson
  • Publication number: 20150015408
    Abstract: A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.
    Type: Application
    Filed: September 29, 2014
    Publication date: January 15, 2015
    Inventors: Mark D. TUPA, Michael R. DURHAM, Christopher RIJKEN, Louis B. HOBSON, Joshua N. McMAHON
  • Patent number: 8898412
    Abstract: A computer system is provided, the computer system having a processor and a system memory coupled to the processor. The computer system also includes a Basic Input/Output System (BIOS) in communication with the processor. The BIOS selectively scrubs the system memory during a shutdown process of the computer system.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: November 25, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Louis B. Hobson, Wael M. Ibrahim, Manuel Novoa
  • Patent number: 8886974
    Abstract: A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: November 11, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mark D. Tupa, Michael R. Durham, Christopher Rijken, Louis B. Hobson, Joshua N. McMahon
  • Patent number: 8850601
    Abstract: Systems and methods of determining a trust level from system management mode are disclosed. One such method includes: responsive to a system management mode interrupt (SMI), determining a trust level associated with code invoking the SMI; and responsive to determining that the trust level is untrusted, granting or denying a request made by the code invoking the SMI based at least in part on a type of the request.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: September 30, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mark A. Piwonka, Bernard D. Desselle, Louis B. Hobson
  • Patent number: 8495354
    Abstract: Systems and methods of securely updating BIOS are disclosed. One such system comprises a reprogrammable memory, a first and a second register, and comparison logic. The reprogrammable memory comprises a first portion and a protect input. The protect input is configured to disallow writes to at least the first portion when the memory protect input is at a first level, and to allow writes to at least the first portion when the protect input is at a second level; The comparison logic is configured to drive a comparison output to a third level responsive to the first and second registers having equal values, and to drive the comparison output to a fourth level responsive to the first and second registers having different values. The comparison output is electrically coupled to the memory protect input.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: July 23, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Louis B. Hobson, Mark A. Piwonka, Gregory P. Ziarnik
  • Publication number: 20130103961
    Abstract: An electronic device (100) includes a network interface controller (102) and an input/output controller (110, 202) having a link layer. A portion of the input/output controller is configured to be powered off during a lower power mode of the electronic device, where the first portion contains the link layer. Wakeup logic (108) separate from the input/output controller receives a wake indication from the network interface controller in response to the physical layer receiving a wake message on the network while the electronic device is in the lower power mode. The wakeup logic activates an indication to awaken the electronic device from the lower power mode in response to the wake indication from the network interface controller.
    Type: Application
    Filed: June 25, 2010
    Publication date: April 25, 2013
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Robert C Brooks, Michael Richard Durham, Mark D Tupa, Louis B Hobson
  • Publication number: 20120198113
    Abstract: Embodiments herein relate to measuring a continuous time period a power button signal is in an active state. In an embodiment, a controller is to measure the continuous time period the power button signal is in an active state, where the power button signal enters the active state when a power button is physically activated by a user to initiate a power down of a system. Further, the controller is to generate and send an interrupt to the system if the continuous time period is greater than a controller time, the interrupt having higher priority than an operating system of the system.
    Type: Application
    Filed: January 27, 2011
    Publication date: August 2, 2012
    Inventors: Gregory P. Ziarnik, Mark Piwonka, Louis B. Hobson
  • Patent number: 8171274
    Abstract: A method and system of executing stack-based memory reference code. At least some of the illustrated embodiments are methods comprising waking a computer system from a reduced power operational state in which a memory controller loses at least some configuration information, executing memory reference code that utilizes a stack (wherein the memory reference code configures the main memory controller), and passing control of the computer system to an operating system. The time between executing a first instruction after waking the computer system and passing control to the operating system takes less than 200 milliseconds.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: May 1, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Louis B. Hobson, Mark A. Piwonka
  • Publication number: 20120102347
    Abstract: A computing machine to power a memory to retain a process state of the computing machine if the computing machine is in a sleep state and transfer the process state from the memory to a non-volatile storage device, where the computing machine remains in the sleep state as the process state is transferred from the memory to the non-volatile storage device.
    Type: Application
    Filed: October 22, 2010
    Publication date: April 26, 2012
    Inventor: Louis B. Hobson
  • Patent number: 8166288
    Abstract: A coordinator in a computer system receives a request from one of a plurality of operating systems (that coexist in the computer system) to invoke a service of a management routine in the computer system. The plurality of operating systems execute in respective virtual machines of the computer system. The coordinator processes the received request to invoke the service of the management routine to prevent a conflict from occurring with respect to at least another one of the plurality of operating systems.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: April 24, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jose A. Sancho-Dominguez, Louis B. Hobson
  • Publication number: 20120017285
    Abstract: Systems and methods of determining a trust level from system management mode are disclosed. One such method includes: responsive to a system management mode interrupt (SMI), determining a trust level associated with code invoking the SMI; and responsive to determining that the trust level is untrusted, granting or denying a request made by the code invoking the SMI based at least in part on a type of the request.
    Type: Application
    Filed: May 18, 2009
    Publication date: January 19, 2012
    Inventors: Mark A Piwonka, Bernard D. Desselle, Louis B. Hobson
  • Publication number: 20110179299
    Abstract: A system has a processor and a voltage converter to provide a power voltage to the processor. The processor is able to transition among different power modes, Wherein the voltage converter receives indications to specify different voltage levels of the power voltage for at least two of the power modes. A controller detects a transition of the processor to a tower one of the power modes, and in response to detecting transition of the processor to the lower one of the power modes, disables at least one portion of the voltage converter.
    Type: Application
    Filed: October 7, 2008
    Publication date: July 21, 2011
    Inventors: Mark A Piwonka, Louis B. Hobson, Robert C. Brooks