Abstract: A deskew circuit for synchronizing output signals from a fanout buffer. The circuit includes one capacitive element coupled to each of the buffer's output nodes. Each capacitive element is also coupled to a common floating bus. The capacitive element is preferably a capacitor and the common floating bus is electrically isolated from any power rails. The bus may be formed of polysilicon or metal.

Abstract: A digital-data-transmission-line circuit for actively clamping transmission signal and signal-complement amplitudes so as to reduce pattern-related jitter at a receiver/analyzer. The circuit includes a pair of opposing diode devices, where each diode device is coupled across the pair of conducting wires that make up the transmission line. The diode devices clamp the difference in potential between the two transmission lines so that the signal amplitude seen at the receiver will not vary to significantly with the number of like pulses that are transmitted in succession. In this manner, the present invention reduces pattern-dependent jitter in the cross-over from HIGH to LOW as seen at the receiver. By means of the parasitic capacitance accompanying the diode devices, the circuit of the present invention additionally provides some high-frequency filtering and smoothing of the waveform of the received signal.