Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

Abstract: A method is for making an electronic device and includes forming an interconnect layer stack on a sacrificial substrate and having a plurality of patterned electrical conductor layers, and a dielectric layer between adjacent patterned electrical conductor layers. The method also includes laminating and electrically joining through an intermetallic bond a liquid crystal polymer (LCP) substrate to the interconnect layer stack on a side thereof opposite the sacrificial substrate. The method further includes removing the sacrificial substrate to expose a lowermost patterned electrical conductor layer, and electrically coupling at least one first device to the lowermost patterned electrical conductor layer.

Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

Abstract: A method is for making a non-planar three-dimensional (3D) multilayered circuit board. The method may include forming a stacked arrangement including at least one pair of liquid crystal polymer (LCP) layers with a bonding layer therebetween. The stacked arrangement may further include at least one electrically conductive pattern layer on at least one of the LCP layers. The method may further include heating and applying pressure to the stacked arrangement to shape the stacked arrangement into a non-planar 3D shape and concurrently causing the bonding layer to bond together the adjacent LCP layers of the stacked arrangement to thereby form the non-planar 3D multi-layered circuit board.

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.

Abstract: A method is for making an electrical inductor. The method includes forming a first subunit having a sacrificial substrate, and an electrically conductive layer defining the electrical inductor and including a first metal on the sacrificial substrate. The method includes forming a second subunit having a dielectric layer and an electrically conductive layer thereon defining electrical inductor terminals and having the first metal, and coating a second metal onto the first metal of one of the first and second subunits. The method includes aligning the first and second subunits together, heating and pressing the aligned first and second subunits to form an intermetallic compound of the first and second metals bonding adjacent metal portions together, and removing the sacrificial substrate.

Abstract: A method is for making an electrical inductor. The method includes forming a first subunit having a sacrificial substrate, and an electrically conductive layer defining the electrical inductor and including a first metal on the sacrificial substrate. The method includes forming a second subunit having a dielectric layer and an electrically conductive layer thereon defining electrical inductor terminals and having the first metal, and coating a second metal onto the first metal of one of the first and second subunits. The method includes aligning the first and second subunits together, heating and pressing the aligned first and second subunits to form an intermetallic compound of the first and second metals bonding adjacent metal portions together, and removing the sacrificial substrate.

Abstract: An electronic device includes a substrate with a circuit layer thereon that has a solder pad. There is a liquid crystal polymer (LCP) solder mask on the substrate that has an aperture aligned with the solder pad. There is a fused seam between the substrate and the LCP solder mask. Solder is in the aperture, and a circuit component is electrically coupled to the solder pad via the solder. A first dielectric layer stack having a first plurality of dielectric layers is on the LCP solder mask and has an aperture aligned with the solder pad. There is a first LCP outer sealing layer on the first dielectric layer stack, and a second dielectric layer stack having a second plurality of dielectric layers on the substrate on a side thereof opposite the LCP solder mask. Further, there is a second LCP outer sealing layer on the second dielectric layer stack.

Abstract: A method is for making an electrical inductor. The method includes forming a first subunit having a sacrificial substrate, and an electrically conductive layer defining the electrical inductor and including a first metal on the sacrificial substrate. The method includes forming a second subunit having a dielectric layer and an electrically conductive layer thereon defining electrical inductor terminals and having the first metal, and coating a second metal onto the first metal of one of the first and second subunits. The method includes aligning the first and second subunits together, heating and pressing the aligned first and second subunits to form an intermetallic compound of the first and second metals bonding adjacent metal portions together, and removing the sacrificial substrate.

Abstract: A method has been described for making an electrical structure having an air dielectric and includes forming a first subunit including a sacrificial substrate, an electrically conductive layer including a first metal on the sacrificial substrate, and a sacrificial dielectric layer on the sacrificial substrate and the electrically conductive layer. The method further includes forming a second subunit including a dielectric layer and an electrically conductive layer thereon including the first metal, and coating a second metal onto the first metal of one or more of the first and second subunits. The method also includes aligning the first and second subunits together, heating and pressing the aligned first and second subunits to form an intermetallic compound of the first and second metals bonding adjacent metal portions together, and removing the sacrificial substrate and sacrificial dielectric layer to thereby form the electrical structure having the air dielectric.

Abstract: A method is for making a multilayer circuit board from circuit board layers, each including a dielectric layer and conductive traces thereon including a first metal. The method includes forming a through-via in a first circuit board layer, plating the through-via with the first metal, and coating a second metal onto the first metal of the first circuit board layer, the plated through-via, and the first metal. The method also includes aligning the first and second circuit board layers together so that the plated through-via of the first circuit board layer is adjacent a feature on the second circuit board layer, and heating and pressing the aligned first and second circuit board layers so as to laminate the dielectric layers together and form an intermetallic compound of the first and second metals bonding adjacent metal portions together.

Abstract: A micro electrical-mechanical systems (MEMS) device INCLUDES a MEMS substrate and at least one MEMS structure on the MEMS substrate. In addition, there is at least one battery cell on the MEMS substrate coupled to the at least one MEMS structure. The at least one battery cell includes a support fin extending vertically upward from the MEMS substrate and a first electrode layer on the support fin. In addition, there is an electrolyte layer on the cathode layer, and a second electrode layer on the electrolyte layer. The support fin may have a height greater than a width. The first electrode layer may have a processing temperature associated therewith that exceeds a stability temperature associated with the second electrode layer.

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.

Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

Abstract: A method is for making an electronic device and includes forming an interconnect layer stack on a sacrificial substrate and having a plurality of patterned electrical conductor layers, and a dielectric layer between adjacent patterned electrical conductor layers. The method also includes laminating and electrically joining through an intermetallic bond a liquid crystal polymer (LCP) substrate to the interconnect layer stack on a side thereof opposite the sacrificial substrate. The method further includes removing the sacrificial substrate to expose a lowermost patterned electrical conductor layer, and electrically coupling at least one first device to the lowermost patterned electrical conductor layer.

Abstract: An electronic device includes a substrate with a circuit layer thereon that has a solder pad. There is a liquid crystal polymer (LCP) solder mask on the substrate that has an aperture aligned with the solder pad. There is a fused seam between the substrate and the LCP solder mask. Solder is in the aperture, and a circuit component is electrically coupled to the solder pad via the solder. A first dielectric layer stack having a first plurality of dielectric layers is on the LCP solder mask and has an aperture aligned with the solder pad. There is a first LCP outer sealing layer on the first dielectric layer stack, and a second dielectric layer stack having a second plurality of dielectric layers on the substrate on a side thereof opposite the LCP solder mask. Further, there is a second LCP outer sealing layer on the second dielectric layer stack.

Abstract: An electronic device includes a multilayer circuit board having a non-planar three-dimensional shape defining a battery component receiving recess. The multilayer circuit board may include at least one pair of liquid crystal polymer (LCP) layers, and at least one electrically conductive pattern layer on at least one of the LCP layers and defining at least one battery electrode adjacent to the battery component receiving recess. The electronic device may further include a battery component within the battery component receiving recess and coupled to the at least one battery electrode to define a battery.

Abstract: A micro electrical-mechanical systems (MEMS) device INCLUDES a MEMS substrate and at least one MEMS structure on the MEMS substrate. In addition, there is at least one battery cell on the MEMS substrate coupled to the at least one MEMS structure. The at least one battery cell includes a support fin extending vertically upward from the MEMS substrate and a first electrode layer on the support fin. In addition, there is an electrolyte layer on the cathode layer, and a second electrode layer on the electrolyte layer. The support fin may have a height greater than a width. The first electrode layer may have a processing temperature associated therewith that exceeds a stability temperature associated with the second electrode layer.

Abstract: A method is for making a non-planar three-dimensional (3D) multilayered circuit board. The method may include forming a stacked arrangement including at least one pair of liquid crystal polymer (LCP) layers with a bonding layer therebetween. The stacked arrangement may further include at least one electrically conductive pattern layer on at least one of the LCP layers. The method may further include heating and applying pressure to the stacked arrangement to shape the stacked arrangement into a non-planar 3D shape and concurrently causing the bonding layer to bond together the adjacent LCP layers of the stacked arrangement to thereby form the non-planar 3D multi-layered circuit board.