Patents by Inventor Luc Alain Chouinard

Luc Alain Chouinard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8625627
    Abstract: An interface for controlling the transmission of data between integrated circuit (IC) chips. The interface comprises a data bus for transmitting data from a first integrated circuit chip to a second integrated circuit chip, and a control bus for transmitting control signals between the first and second integrated circuits. The first IC has a memory for receiving data for transmission to the second IC, and the second IC has a scheduler and a data output port, the scheduler being arranged to control the transfer of data from the memory of the first IC to the data output port of the second IC via the data bus. The interface is capable of stopping and reinitiating data transmission on detection of errors in transmitted data, and the interface may include a code transfer bus for transferring error detection code separately from associated data.
    Type: Grant
    Filed: March 7, 2010
    Date of Patent: January 7, 2014
    Assignee: Alcatel Lucent
    Inventors: Patrick Gene Russell, Luc Alain Chouinard, Kizito Gysbertus Antonius Van Asten
  • Patent number: 7751418
    Abstract: An interface for controlling the transmission of data between integrated circuit (IC) chips. The interface comprises a data bus for transmitting data from a first integrated circuit chip to a second integrated circuit chip, and a control bus for transmitting control signals between the first and second integrated circuits. The first IC has a memory for receiving data for transmission to the second IC, and the second IC has a scheduler and a data output port, the scheduler being arranged to control the transfer of data from the memory of the first IC to the data output port of the second IC via the data bus. The interface is capable of stopping and reinitiating data transmission on detection of errors in transmitted data, and the interface may include a code transfer bus for transferring error detection code separately from associated data.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: July 6, 2010
    Assignee: Alcatel-Lucent Canada Inc.
    Inventors: Patrick Gene Russell, Luc Alain Chouinard, Kizito Gysbertus Antonius Van Asten
  • Publication number: 20100155493
    Abstract: An interface for controlling the transmission of data between integrated circuit (IC) chips. The interface comprises a data bus for transmitting data from a first integrated circuit chip to a second integrated circuit chip, and a control bus for transmitting control signals between the first and second integrated circuits. The first IC has a memory for receiving data for transmission to the second IC, and the second IC has a scheduler and a data output port, the scheduler being arranged to control the transfer of data from the memory of the first IC to the data output port of the second IC via the data bus. The interface is capable of stopping and reinitiating data transmission on detection of errors in transmitted data, and the interface may include a code transfer bus for transferring error detection code separately from associated data.
    Type: Application
    Filed: March 7, 2010
    Publication date: June 24, 2010
    Inventors: Patrick Gene RUSSELL, Luc Alain Chouinard, Kizito Gysbertus Antonius Van Asten
  • Publication number: 20030123389
    Abstract: An interface for controlling the transmission of data between integrated circuit (IC) chips. The interface comprises a data bus for transmitting data from a first integrated circuit chip to a second integrated circuit chip, and a control bus for transmitting control signals between the first and second integrated circuits. The first IC has a memory for receiving data for transmission to the second IC, and the second IC has a scheduler and a data output port, the scheduler being arranged to control the transfer of data from the memory of the first IC to the data output port of the second IC via the data bus. The interface is capable of stopping and reinitiating data transmission on detection of errors in transmitted data, and the interface may include a code transfer bus for transferring error detection code separately from associated data.
    Type: Application
    Filed: September 20, 2002
    Publication date: July 3, 2003
    Inventors: Patrick Gene Russell, Luc Alain Chouinard, Kizito Gysbertus Antonius Van Asten