Patents by Inventor Luca Figini

Luca Figini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for avoiding offset in and reducing the footprint of a non-volatile memory
    Patent number: 7301814
    Abstract: A system and method for avoiding offset in and reducing the footprint of a non-volatile memory that has a plurality of memory bank circuits. Each memory bank circuit has memory cells coupled to sense amplifiers, row and column decoders coupled to the memory cells, and bias circuits coupled to the sense amplifiers. The system includes a reference cell matrix coupled to each of the plurality of memory bank circuits. The reference cell matrix is configured to provide reference cell current for each of the plurality of memory bank circuits.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: November 27, 2007
    Assignee: Atmel Corporation
    Inventors: Massimiliano Frulio, Riccardo Riva Reggiori, Andrea Sacco, Luca Figini
  • Method and system for managing a suspend request in a flash memory
    Patent number: 7302518
    Abstract: System and method for the managing of suspend requests in flash memory devices. The system includes a microcontroller performing a modify operation on a flash memory array, a memory coupled to the microcontroller and storing suspend sequence code for causing a suspension of the modify operation when executed by the microcontroller, and suspend circuitry that receives a suspend request from a user to suspend the modify operation and starts the execution of the suspend sequence code.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: November 27, 2007
    Assignee: Atmel Corporation
    Inventors: Stefano Surico, Simone Bartoli, Monica Marziani, Luca Figini
  • Method and system for managing a suspend request in a flash memory
    Publication number: 20060161727
    Abstract: System and method for the managing of suspend requests in flash memory devices. The system includes a microcontroller performing a modify operation on a flash memory array, a memory coupled to the microcontroller and storing suspend sequence code for causing a suspension of the modify operation when executed by the microcontroller, and suspend circuitry that receives a suspend request from a user to suspend the modify operation and starts the execution of the suspend sequence code.
    Type: Application
    Filed: June 2, 2005
    Publication date: July 20, 2006
    Inventors: Stefano Surico, Simone Bartoli, Monica Marziani, Luca Figini
  • System and method for avoiding offset in and reducing the footprint of a non-volatile memory
    Publication number: 20060077709
    Abstract: A system and method for avoiding offset in and reducing the footprint of a non-volatile memory that has a plurality of memory bank circuits. Each memory bank circuit has memory cells coupled to sense amplifiers, row and column decoders coupled to the memory cells, and bias circuits coupled to the sense amplifiers. The system includes a reference cell matrix coupled to each of the plurality of memory bank circuits. The reference cell matrix is configured to provide reference cell current for each of the plurality of memory bank circuits.
    Type: Application
    Filed: May 11, 2005
    Publication date: April 13, 2006
    Inventors: Massimiliano Frulio, Riccardo Reggiori, Andrea Sacco, Luca Figini
  • Negative charge pump with bulk biasing
    Patent number: 6831499
    Abstract: An n-channel MOS transistor negative-voltage charge pump is disclosed in which the bulks of the n-channel MOS transistors are biased in such a manner as to prevent turning on the parasitic bipolar transistor inherent in the CMOS environment of the charge pump structure.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: December 14, 2004
    Assignee: Atmel Corporation
    Inventors: Giorgio Oddone, Massimiliano Frulio, Luca Figini, Fabio Tassan Caser
  • Negative charge pump with bulk biasing
    Publication number: 20040057259
    Abstract: An n-channel MOS transistor negative-voltage charge pump is disclosed in which the bulks of the n-channel MOS transistors are biased in such a manner as to prevent turning on the parasitic bipolar transistor inherent in the CMOS environment of the charge pump structure.
    Type: Application
    Filed: April 3, 2003
    Publication date: March 25, 2004
    Applicant: Atmel Corporation, a Delaware Corporation
    Inventors: Giorgio Oddone, Massimiliano Frulio, Luca Figini, Fabio Tassan Caser