Patents by Inventor Luigi Difilippo

Luigi Difilippo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7281326
    Abstract: Techniques for reducing the number of layers in a multilayer signal routing device are disclosed. The technique may be realized as a method for routing one or more conductive traces between a plurality of electronic components of a multilayer signal routing device. The method comprises forming a first inter-component channel at a first routing layer of the multilayer signal routing device, the first inter-component channel extending between a first set of two or more electronic components of the plurality of electronic components and having a first orientation and forming a second inter-component channel at a second routing layer of the multilayer signal routing device, the second inter-component channel extending between a second set of two or more electronic components of the plurality of electronic components and having a second orientation different from the first orientation.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: October 16, 2007
    Assignee: Nortel Network Limited
    Inventors: Herman Kwong, Aneta Wyrzykowska, Kah Ming Soh, Eileen Goulet, Luigi Difilippo, Larry Marcanti
  • Patent number: 7259336
    Abstract: A technique for improving power/ground flooding is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for improving power and ground flooding in a multilayer circuit board, the multilayer circuit board having a plurality of signal layers. The method may comprise forming a plurality of electrically conductive vias, wherein each of the plurality of electrically conductive vias extends through one or more of the plurality of signal layers. The method may also comprise routing signals associated with the plurality of electrically conductive vias, thereby creating at least one power/ground flooding channel. The method may additionally comprise forming at least one power/ground connection within the at least one power/ground flooding channel.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: August 21, 2007
    Assignee: Nortel Networks Limited
    Inventors: Aneta Wyrzykowska, Herman Kwong, Luigi Difilippo
  • Publication number: 20060254810
    Abstract: A technique for accommodating electronic components on a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a multilayer signal routing device comprising a primary surface and a secondary surface. The primary surface may have a plurality of electrically conductive pads formed thereon, wherein a group of the plurality of electrically conductive pads is in respective electrical connection with a group of electrically conductive micro-vias formed in the multilayer signal routing device. The secondary surface may have a channel formed thereon coinciding with the location of the group of electrically conductive micro-vias, wherein the channel has a channel area on the secondary surface for accommodating an electronic component mounted on the secondary surface.
    Type: Application
    Filed: July 19, 2006
    Publication date: November 16, 2006
    Applicant: Nortel Networks Limited
    Inventors: Herman Kwong, Luigi Difilippo, Guy Duxbury, Larry Marcanti
  • Patent number: 7107673
    Abstract: A technique for accommodating electronic components on a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for accommodating electronic components on a multilayer signal routing device. Such a method comprises determining a component space that is required to accommodate a plurality of electronic components on a surface of a multilayer signal routing device, and then forming at least one signal routing channel on at least the surface of the multilayer signal routing device, wherein the at least one signal routing channel has a channel space that is equal to or greater than the component space.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: September 19, 2006
    Assignee: Nortel Networks Limited
    Inventors: Herman Kwong, Luigi Difilippo, Guy Duxbury, Larry Marcanti
  • Publication number: 20050257958
    Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.
    Type: Application
    Filed: July 27, 2005
    Publication date: November 24, 2005
    Applicant: Nortel Networks Limited
    Inventors: Aneta Wyrzykowska, Herman Kwong, Luigi Difilippo
  • Patent number: 6936502
    Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: August 30, 2005
    Assignee: Nortel Networks Limited
    Inventors: Aneta Wyrzykowska, Herman Kwong, Luigi Difilippo
  • Publication number: 20040226742
    Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.
    Type: Application
    Filed: May 14, 2003
    Publication date: November 18, 2004
    Inventors: Aneta Wyrzykowska, Herman Kwong, Luigi Difilippo
  • Patent number: 6817870
    Abstract: A circuit device for interconnecting first and second multilayer circuit boards is described herein. The first multilayer circuit board may include a first plurality of electrically conductive vias of varying depths and the second multilayer circuit board may include a second plurality of electrically conductive vias. The circuit device comprises a first plurality of pins located on a first side of the circuit device corresponding to the first plurality of electrically conductive vias of the first multilayer circuit board, each pin having a length compatible with a depth of a respective one of the first plurality of electrically conductive vias of the first multilayer circuit board. The circuit device further comprises a second plurality of pins located on a second side of the circuit device corresponding to the second plurality of electrically conductive vias of the second multilayer circuit board.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: November 16, 2004
    Assignee: Nortel Networks Limited
    Inventors: Herman Kwong, Aneta Wyrzykowska, Luigi Difilippo
  • Publication number: 20040216916
    Abstract: A technique for improving power/ground flooding is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for improving power and ground flooding in a multilayer circuit board, the multilayer circuit board having a plurality of signal layers. The method may comprise forming a plurality of electrically conductive vias, wherein each of the plurality of electrically conductive vias extends through one or more of the plurality of signal layers. The method may also comprise routing signals associated with the plurality of electrically conductive vias, thereby creating at least one power/ground flooding channel. The method may additionally comprise forming at least one power/ground connection within the at least one power/ground flooding channel.
    Type: Application
    Filed: June 7, 2004
    Publication date: November 4, 2004
    Inventors: Aneta Wyrzykowska, Herman Kwong, Luigi Difilippo
  • Publication number: 20040099440
    Abstract: A technique for accommodating electronic components on a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for accommodating electronic components on a multilayer signal routing device. Such a method comprises determining a component space that is required to accommodate a plurality of electronic components on a surface of a multilayer signal routing device, and then forming at least one signal routing channel on at least the surface of the multilayer signal routing device, wherein the at least one signal routing channel has a channel space that is equal to or greater than the component space.
    Type: Application
    Filed: November 20, 2003
    Publication date: May 27, 2004
    Inventors: Herman Kwong, Luigi Difilippo, Guy Duxbury, Larry Marcanti