Abstract: One or more frame slots to each transceiver are allocated for communication within each message cycle. The number of frame slots allocated can be dynamically adjusted to accommodate variable traffic loads per transceiver, and an offset of the frame slots within the message cycle is preferably predefined to provide a uniform distribution among the transceivers. The design of the transceiver is independent of the particular application, having at least one programmable parameter that controls the number of frame slots allocated within the message cycle. By controlling the number of frame slots allocated to a transceiver, the amount of inactive time, and hence battery life, can be controlled. When a conflict occurs among multiple transceivers having pending messages at the same frame slot, the allocation of the frame slot to a transceiver is based at least in part on the resultant lag time to each transceiver.

Abstract: Existing message fields and/or message parameters are configured to facilitate the packet and message synchronization and decoding tasks that conventionally rely upon a known bit sequence in each packet, thereby eliminating the need for a predefined message preamble in each packet. In example embodiments, the unique identifier of each transmitter is structured to facilitate determination of bit polarity and the start of each packet; packet sequence numbers use an unconventional counting sequence to assure synchronizing bit transitions; and so on. Other techniques, such as the use of run-length limited (RLL) message encoding, or 8b/10b encoding, to assure within-packet bit transitions, are also used to enhance clock synchronization and proper header location determination.

Abstract: One or more frame slots to each transceiver are allocated for communication within each message cycle. The number of frame slots allocated can be dynamically adjusted to accommodate variable traffic loads per transceiver, and an offset of the frame slots within the message cycle is preferably predefined to provide a uniform distribution among the transceivers. The design of the transceiver is independent of the particular application, having at least one programmable parameter that controls the number of frame slots allocated within the message cycle. By controlling the number of frame slots allocated to a transceiver, the amount of inactive time, and hence battery life, can be controlled. When a conflict occurs among multiple transceivers having pending messages at the same frame slot, the allocation of the frame slot to a transceiver is based at least in part on the resultant lag time to each transceiver.

Abstract: Existing message fields and/or message parameters are configured to facilitate the packet and message synchronization and decoding tasks that conventionally rely upon a known bit sequence in each packet, thereby eliminating the need for a predefined message preamble in each packet. In example embodiments, the unique identifier of each transmitter is structured to facilitate determination of bit polarity and the start of each packet; packet sequence numbers use an unconventional counting sequence to assure synchronizing bit transitions; and so on. Other techniques, such as the use of run-length limited (RLL) message encoding, or 8b/10b encoding, to assure within-packet bit transitions, are also used to enhance clock synchronization and proper header location determination.

Abstract: A spacecraft architecture and accompanying standard allows for the creation of a spacecraft using an assortment of modules that comply with the standard. The standard preferably includes both mechanical and electrical compatibility criteria. To assure physical/mechanical compatibility, the structure of each module is constrained to be compatible with any other compatible module. To minimize the interference among modules, the extent of each module in select dimensions is also constrained. To assure functional compatibility, a common communication format is used to interface with each module, and each public-function module is configured to respond to requests for function capabilities that it can provide to other functions. Each module is preferably designed to provide structural support to the assemblage of modules, and an anchor module is provided or defined for supporting the entire assemblage and coupling the assemblage to other structures, such as a launch vehicle.

Abstract: One or more frame slots to each transceiver are allocated for communication within each message cycle. The number of frame slots allocated can be dynamically adjusted to accommodate variable traffic loads per transceiver, and an offset of the frame slots within the message cycle is preferably predefined to provide a uniform distribution among the transceivers. The design of the transceiver is independent of the particular application, having at least one programmable parameter that controls the number of frame slots allocated within the message cycle. By controlling the number of frame slots allocated to a transceiver, the amount of inactive time, and hence battery life, can be controlled. When a conflict occurs among multiple transceivers having pending messages at the same frame slot, the allocation of the frame slot to a transceiver is based at least in part on the resultant lag time to each transceiver.

Abstract: A receiving system allows for the coherent detection of a spread-spectrum transmission at any point in time during the transmission, thereby avoiding the need to identify the start of the transmission during the transmission-detection process. An input buffer captures the transmissions on a communication channel using a moving time-window. A detector processes a time-slice from the input buffer and identifies all of the simultaneously transmitting transmitters during that time-slice. As each transmitter is identified, the demodulator traces back-in-time to identify where the message can first be detected in the input buffer. The transmission includes suitable characteristics to facilitate detection and demodulation of the message content, but need not contain a preamble to allow the detection process.

Abstract: Existing message fields and/or message parameters are configured to facilitate the packet and message synchronization and decoding tasks that conventionally rely upon a known bit sequence in each packet, thereby eliminating the need for a predefined message preamble in each packet. In example embodiments, the unique identifier of each transmitter is structured to facilitate determination of bit polarity and the start of each packet; packet sequence numbers use an unconventional counting sequence to assure synchronizing bit transitions; and so on. Other techniques, such as the use of run-length limited (RLL) message encoding, or 8b/10b encoding, to assure within-packet bit transitions, are also used to enhance clock synchronization and proper header location determination.