Patents by Inventor Luis Huerta
Luis Huerta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10196871Abstract: A control system for a subsea blowout preventer (BOP) positioned in a lower stack, the lower stack releasably engaged with a lower marine riser package (LMRP). The control system includes a surface logic solver positioned at or adjacent the surface of the sea that generates commands for operating the subsea BOP, a first subsea logic solver attached to the LMRP and in communication with the surface logic solver so that the first subsea logic solver receives the commands from the surface logic solver, and a second subsea logic solver attached to a hydraulic control unit in the lower stack. The second subsea logic solver is in hydraulic communication with the subsea BOP, and the first subsea logic solver so that the second subsea logic solver receives the commands from the first subsea logic solver and implements the commands by activating the hydraulic control unit to operate the BOP.Type: GrantFiled: June 15, 2017Date of Patent: February 5, 2019Assignee: Hydril USA Distribution LLCInventors: John S. Holmes, Amine Abou-Assaad, Douglas Milliman, Luis Huerta
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Patent number: 9803448Abstract: A control system for a subsea blowout preventer (BOP) positioned in a lower stack, the lower stack releasably engaged with a lower marine riser package (LMRP). The control system includes a surface logic solver positioned at or adjacent the surface of the sea that generates commands for operating the subsea BOP, a first subsea logic solver attached to the LMRP and in communication with the surface logic solver so that the first subsea logic solver receives the commands from the surface logic solver, and a second subsea logic solver attached to a hydraulic control unit in the lower stack. The second subsea logic solver is in hydraulic communication with the subsea BOP, and the first subsea logic solver so that the second subsea logic solver receives the commands from the first subsea logic solver and implements the commands by activating the hydraulic control unit to operate the BOP.Type: GrantFiled: September 30, 2015Date of Patent: October 31, 2017Assignee: HYDRIL USA DISTRIBUTION, LLCInventors: John S. Holmes, Douglas Milliman, Luis Huerta
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Publication number: 20170284164Abstract: A control system for a subsea blowout preventer (BOP) positioned in a lower stack, the lower stack releasably engaged with a lower marine riser package (LMRP). The control system includes a surface logic solver positioned at or adjacent the surface of the sea that generates commands for operating the subsea BOP, a first subsea logic solver attached to the LMRP and in communication with the surface logic solver so that the first subsea logic solver receives the commands from the surface logic solver, and a second subsea logic solver attached to a hydraulic control unit in the lower stack. The second subsea logic solver is in hydraulic communication with the subsea BOP, and the first subsea logic solver so that the second subsea logic solver receives the commands from the first subsea logic solver and implements the commands by activating the hydraulic control unit to operate the BOP.Type: ApplicationFiled: June 15, 2017Publication date: October 5, 2017Applicant: Hydril USA Distribution LLCInventors: John S. Holmes, Amine Abou-Assaad, Douglas Milliman, Luis Huerta
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Publication number: 20160090810Abstract: A control system for a subsea blowout preventer (BOP) positioned in a lower stack, the lower stack releasably engaged with a lower marine riser package (LMRP). The control system includes a surface logic solver positioned at or adjacent the surface of the sea that generates commands for operating the subsea BOP, a first subsea logic solver attached to the LMRP and in communication with the surface logic solver so that the first subsea logic solver receives the commands from the surface logic solver, and a second subsea logic solver attached to a hydraulic control unit in the lower stack. The second subsea logic solver is in hydraulic communication with the subsea BOP, and the first subsea logic solver so that the second subsea logic solver receives the commands from the first subsea logic solver and implements the commands by activating the hydraulic control unit to operate the BOP.Type: ApplicationFiled: September 30, 2015Publication date: March 31, 2016Inventors: John S. Holmes, Douglas Milliman, Luis Huerta
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Patent number: 9179741Abstract: Method for obtaining a plantar image using means for securing and tightening an elastic membrane, as well as to the double-sided machining of the obtained insole, said means taking the form of two adjustable horizontal bars positioned on a scanner or a plurality of cameras and an anti-reflective lens, wherein a membrane is positioned between said horizontal bars and secured using T-flat bars; the stress of the membrane being adjusted using a handle; the foot is positioned on the membrane; an image is taken; and the insole is subjected to double-sided machining on the basis of the image of the surface provided in STL format, with the aid of a securing device that enables the pieces to be rotated up to 180°. The device used includes a plurality of supporting bars with two adjustable horizontal bars, wherein the elastic membrane is adjusted and tightened using T-flat bars and a handle.Type: GrantFiled: July 15, 2009Date of Patent: November 10, 2015Assignee: PODO ACTIVA, S.L.Inventors: Victor Alfaro Santafe, Javier Alfaro Santafe, Carla Lanuza Cerzocimo, Angel Perero Lorenz, Jose Javier Marin Zurdo, Jose Luis Huertas Talon, Francisco Valdivia Calvo, Juan Jose Aguilar Martin, David Guillonia Sanbartolome, Carlos Cajal Hernando
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Patent number: 8593211Abstract: A half-bridge power circuit comprises a first gallium nitride field effect transistor (GaN FET); a first driver coupled to a gate of the first GaN FET; an anode of a capacitor coupled to an output of the driver and a source of the first GaN FET; a diode having a cathode coupled to the cathode of the capacitor; and a bootstrap capacitor clamp (BCC) controller, including: a field effect transistor (FET) coupled to an anode of the diode, and a comparator coupled to a gate of the FET, the comparator configured to receive as inputs: a) a signal representative of an input voltage (VDRV) applied to the FET; b) a ground; c) a boot signal representative of a voltage at the anode of the capacitor (Boot); and d) a signal representative of a voltage at the source of the first GaN FET (SW).Type: GrantFiled: March 16, 2012Date of Patent: November 26, 2013Assignee: Texas Instruments IncorporatedInventors: Hassan Pooya Forghani-Zadeh, Luis A. Huertas-Sanchez
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Publication number: 20130241621Abstract: A half-bridge power circuit comprises a first gallium nitride field effect transistor (GaN FET); a first driver coupled to a gate of the first GaN FET; an anode of a capacitor coupled to an output of the driver and a source of the first GaN FET; a diode having a cathode coupled to the cathode of the capacitor; and a bootstrap capacitor clamp (BCC) controller, including: a field effect transistor (FET) coupled to an anode of the diode, and a comparator coupled to a gate of the FET, the comparator configured to receive as inputs: a) a signal representative of an input voltage (VDRV) applied to the FET; b) a ground; c) a boot signal representative of a voltage at the anode of the capacitor (Boot); and d) a signal representative of a voltage at the source of the first GaN FET (SW).Type: ApplicationFiled: March 16, 2012Publication date: September 19, 2013Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Hassan Pooya Forghani-Zadeh, Luis A. Huertas-Sanchez
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Publication number: 20110313321Abstract: Method for obtaining a plantar image using means for securing and tightening an elastic membrane, as well as to the double-sided machining of the obtained insole, said means taking the form of two adjustable horizontal bars positioned on a scanner or a plurality of cameras and an anti-reflective lens, wherein a membrane is positioned between said horizontal bars and secured using T-flat bars; the stress of the membrane being adjusted using a handle; the foot is positioned on the membrane; an image is taken; and the insole is subjected to double-sided machining on the basis of the image of the surface provided in STL format, with the aid of a securing device that enables the pieces to be rotated up to 180°. The device used includes a plurality of supporting bars with two adjustable horizontal bars, wherein the elastic membrane is adjusted and tightened using T-flat bars and a handle.Type: ApplicationFiled: July 15, 2009Publication date: December 22, 2011Applicant: PODO ACTIVA, S.L.Inventors: Victor Alfaro Santafe, Javier Alfaro Santafe, Carla Lanuza Cerzocimo, Angel Perero Lorenz, Jose Javier Marin Zurdo, Jose Luis Huertas Talon, Francisco Valdivia Calvo, Juan Jose Aguilar Martin, David Guillonia Sanbartolome, Carlos Cajal Hernando
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Publication number: 20110109374Abstract: In many applications, “dying gasp” periods following power down are used. Conventional circuits supply energy for the “dying gasp” periods generally by use of large external capacitors that are bulky and expensive. Here, a dying gasp charge controller is employed that allows for the use of smaller capacitors at higher voltages, which maintains or exceeds the energy storage capacities of conventional circuits.Type: ApplicationFiled: November 11, 2009Publication date: May 12, 2011Applicant: Texas Instruments IncorporatedInventors: Hassan Pooya Forghani-zadeh, Luis A. Huertas-Sanchez, Li Li
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Patent number: 7940118Abstract: In many applications, “dying gasp” periods following power down are used. Conventional circuits supply energy for the “dying gasp” periods generally by use of large external capacitors that are bulky and expensive. Here, a dying gasp charge controller is employed that allows for the use of smaller capacitors at higher voltages, which maintains or exceeds the energy storage capacities of conventional circuits.Type: GrantFiled: November 11, 2009Date of Patent: May 10, 2011Assignee: Texas Instruments IncorporatedInventors: Hassan Pooya Forghani-zadeh, Luis A. Huertas-Sanchez, Li Li
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Patent number: 6336828Abstract: An automatic power docking mechanism for establishing a power connection between a computer electronic subsystem and a power distribution board within a computer chassis is provided. In one embodiment, the power docking mechanism includes power pads electrically coupled to a power distribution board and a housing with slotted openings secured over the power pads. The housing's slotted openings are configured to receive power bus bars from a computer subsystem and hold the bus bars in contact with the power pads.Type: GrantFiled: August 17, 2000Date of Patent: January 8, 2002Assignee: International Business Machines CorporationInventors: Jose Luis Huerta, Nathan Daniel Gruber, Bruce Edwin Baker