Patents by Inventor Luis Miguel Vaquero Gonzalez

Luis Miguel Vaquero Gonzalez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11610075
    Abstract: Example embodiments relate to hierarchical rule clustering. The examples disclosed herein access information about a set of rules, where information for an individual rule comprises information about a set of hypershapes associated with the individual rule. A respective hypervolume for each set of hypershapes associated with each individual rule may be calculated based on the accessed information. A first rule and a second rule may be combined as a new individual rule in the set of rules based on overlaps between the calculated hypervolumes.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: March 21, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: David Subiros Perez, Luis Miguel Vaquero Gonzalez
  • Patent number: 10878000
    Abstract: Example embodiments relate to extract graph topology from a plurality of databases. The example disclosed herein access metadata from a plurality of distributed databases. The example further access a set of predetermined rules to transform the accessed metadata into a graph description schema. The example finalizes when the visualization of the graph description schema is built.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: December 29, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Luis Miguel Vaquero Gonzalez, Marco Aurelio Barbosa Fagnani Gomes Lotz
  • Publication number: 20200265264
    Abstract: Example embodiments relate to hierarchical rule clustering. The examples disclosed herein access information about a set of rules, where information for an individual rule comprises information about a set of hypershapes associated with the individual rule. A respective hypervolume for each set of hypershapes associated with each individual rule may be calculated based on the accessed information. A first rule and a second rule may be combined as a new individual rule in the set of rules based on overlaps between the calculated hypervolumes.
    Type: Application
    Filed: April 29, 2016
    Publication date: August 20, 2020
    Inventors: David Subiros Perez, Luis Miguel Vaquero Gonzalez
  • Patent number: 10701152
    Abstract: A memory system that is an example of the present disclosure comprises a memory fabric and an overlay. The memory fabric comprises: a network of memory components interconnected by optical interconnects, and memory address spaces of the memory components are aggregated and exposed as if the network were a single memory resource. The memory fabric further comprises router modules to implement steps of a fabric routing protocol to route memory-addressing requests along paths to destination memory components in the memory fabric. The overlay increases resiliency of the memory system and comprises overlay nodes to receive and forward memory-addressing requests from client programs and to implement steps of an overlay routing protocol to selectively control routing of received memory-addressing requests, to destination memory components, either along paths determined according to the fabric routing protocol or along alternative paths via overlay nodes.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: June 30, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Luis Miguel Vaquero Gonzalez, Suksant Sae Lor
  • Patent number: 10671668
    Abstract: Example embodiments relates to method and systems to infer graph topologies. A computing device for inferring a graph topology, comprises a physical processor that executes machine readable instructions that cause the computing device to process a set of unclassified tables. For each table the computing device determines a primary key comprising a set of columns of a table being analyzed, determines a set of foreign keys, each foreign key comprising a column of the analyzed table, and identifies a parameter based on the analyzed table, the primary key and the set of foreign keys. The parameter may comprise a node identification, a set of node attributes, a set of edges without attributes, a set of edges with attributes or a set of edge attributes. The computing device can cause the display of the graph topology based on the processed set of unclassified tables.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: June 2, 2020
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Luis Miguel Vaquero Gonzalez, Marco Aurelio Barbosa Fagnani Gomes Lotz, Brian Quentin Monahan
  • Patent number: 10515012
    Abstract: In one implementation, relationship based cache resource naming and evaluation includes a generate engine to generate a name for a resource being added to a cache, including a plurality of resources, based on a plurality of parameters of a query including an input resource from which the resource is derived, a workflow of the operations to perform to the input resource to generate the resource, and a context associated with the query. In addition, the system includes an evaluate engine to evaluate, in response to an event, each of the plurality of resources and the named resource related to the event.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: December 24, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Eric Deliot, Rycharde J. Hawkes, Luis Miguel Vaquero Gonzalez, Lawrence Wilcock
  • Patent number: 10503636
    Abstract: Examples relate to providing concurrent dead actor collection. In some examples, a blocked notification is received from an actor of a number of actors in a distributed system, where the actors are arranged in an actor hierarchy that describes communication links between the actors. In response to receiving the blocked notification, a blocked status is requested from each other actor in a loop subset of the actors, where each of the other actors is connected to the actor in the actor hierarchy by an incoming edge. After using the blocked status of each of the other actors to determine that incoming edges of the actor refer to blocked actors, the actor is designated for garbage collection.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: December 10, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventor: Luis Miguel Vaquero Gonzalez
  • Patent number: 10242042
    Abstract: According to an example, copy-on-write (COW) update-triggered consistency may include determining a first shared version related to a shared set of data related to a process involving a first application and a process involving a second application. First and second local versions may be respectively assigned to the shared set of data associated with the first and second applications. Initiation of a commit process by the first or second applications may be determined respectively based on a write to the first or second local versions respectively related to the shared set of data associated with the first or second applications. In response to initiation of the commit process, a second shared version may be generated related to the shared set of data based on the respective processes involving the first and the second applications.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: March 26, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Luis Miguel Vaquero Gonzalez
  • Publication number: 20180262568
    Abstract: A memory system that is an example of the present disclosure comprises a memory fabric and an overlay. The memory fabric comprises: a network of memory components interconnected by optical interconnects, and memory address spaces of the memory components are aggregated and exposed as if the network were a single memory resource. The memory fabric further comprises router modules to implement steps of a fabric routing protocol to route memory-addressing requests along paths to destination memory components in the memory fabric. The overlay increases resiliency of the memory system and comprises overlay nodes to receive and forward memory-addressing requests from client programs and to implement steps of an overlay routing protocol to selectively control routing of received memory-addressing requests, to destination memory components, either along paths determined according to the fabric routing protocol or along alternative paths via overlay nodes.
    Type: Application
    Filed: September 24, 2015
    Publication date: September 13, 2018
    Inventor: Luis Miguel Vaquero Gonzalez
  • Publication number: 20180203944
    Abstract: There is provided a non-transitory machine-readable storage medium encoded with instructions executable by a processor. The machine-readable storage medium comprises a graph database comprising first-level vertices and first-level edges, each first-level edge linking two first-level vertices, wherein each first-level vertex represents an entity and each first-level edge represents a relationship between two entities. The machine-readable storage medium further comprises instructions to: responsive to a generation of a result set for a query on the graph database, add a second-level vertex to the graph database, wherein the second-level vertex represents the result set of the query; and add a second-level edge to the graph database, wherein the second-level edge connects the second-level vertex to a first-level vertex.
    Type: Application
    Filed: July 7, 2015
    Publication date: July 19, 2018
    Inventors: Rycharde Hawkes, Eric Deliot, Luis Miguel Vaquero Gonzalez, Lawrence Wilcock
  • Patent number: 10027632
    Abstract: In an implementation, a view of a set of data may be based on a context. The context may include an attribute associated with an attribute list. A set of symbols may be associated with the attribute list and the set of data. A key may be associated with the attribute list and a function list.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: July 17, 2018
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Luis Miguel Vaquero Gonzalez, Suksant Sae Lor, Marco Casassa Mont
  • Publication number: 20180165165
    Abstract: A group of memory modules in a memory system receives a memory operation instruction comprising instructions on a memory operation and sends votes on the possibility to perform the memory operation to a memory coordinator module. The memory coordinator module receives votes and establishes a list of memory modules which have voted positively. The memory coordinator module verifies that the list of memory modules comprises all the memory modules in the group and that there is not another memory coordinator module detected by the memory coordinator module, instructs all the memory modules in the group to commit to the memory operation.
    Type: Application
    Filed: July 31, 2015
    Publication date: June 14, 2018
    Inventors: Luis Miguel Vaquero Gonzalez, Suksant Sae Lor
  • Publication number: 20180150486
    Abstract: A method is described in which a first data set, which is represented by a first model, is provided; a second data set, which is represented by a second model, is provided; information relating to a link to be created between the first data set and the second data set is received; a link creation mechanism is selected based on the received information; an equivalence between the first data set and the second data set is determined using the selected link creation mechanism; an equivalence relation is added to the first model based on the determined equivalence; and an equivalence relation is added to the second model based on the determined equivalence.
    Type: Application
    Filed: May 28, 2015
    Publication date: May 31, 2018
    Inventors: Rycharde Hawkes, Luis Miguel Vaquero Gonzalez, Lawrence Wilcok
  • Publication number: 20180143769
    Abstract: The present disclosure discloses a method comprising: determining a root router memory module of a memory system comprising a plurality of router memory module, each router memory module comprising at least one port to connect the router memory module to at least another router memory module, for each router memory module apart from the root router memory module, identifying a loop-free path from the router memory module to the root router memory module, creating a logical tree using the loop-free paths determined.
    Type: Application
    Filed: July 31, 2015
    Publication date: May 24, 2018
    Inventors: Luis Miguel Vaquero Gonzalez, Suksant Sae Lor
  • Publication number: 20180144003
    Abstract: Automated entity-resolution methods—that may be implemented via execution, by a processor, of machine-readable instructions stored on a non-transitory computer-readable medium—assess similarity between data records, for a group of data records in a data-set, based on a number N of plural attributes of the data records; identify clusters of similar data records in the group based on the assessed similarity; determine, in a multidimensional space having a number D of dimensions less than the number N, respective regions corresponding to different identified clusters, wherein a selected dimensionality-reduction method transforms data records into said multidimensional space; and set up a classifier to identify correspondences between data records and entities based on the regions in the multidimensional space that contain the data records after their transformation according to the selected dimensionality-reduction method.
    Type: Application
    Filed: May 18, 2015
    Publication date: May 24, 2018
    Inventors: Saul Formoso, Luis Miguel Vaquero Gonzalez, Lawrence Wilcock
  • Publication number: 20180121099
    Abstract: The present disclosure discloses memory systems that comprise a network of logically-connected, routable memory modules each comprising an individual memory-address space, in which the memory-address spaces of the individual memory modules are aggregated and exposed as a single memory component to components external to the memory system seeking to write or read data objects in the memory system, and the memory systems are configured to perform data replication according to a lazy data replication protocol to hold plural replicas of data objects in the memory system.
    Type: Application
    Filed: August 14, 2015
    Publication date: May 3, 2018
    Inventors: Luis Miguel Vaquero Gonzalez, Suksant Sae Lor
  • Publication number: 20180121300
    Abstract: Examples of a resilient memory fabric comprise a network of memory components, each memory component comprising a respective address space, wherein the memory fabric comprises the aggregated respective memory as a single addressable memory space. A first memory component of the network of memory components may comprise a first memory local non-transitory machine readable storage medium that stores a set of labeled routes to other memory components in the memory fabric; and a first memory processor that executes machine-readable instructions that cause the first memory component to route data along a selected labeled route.
    Type: Application
    Filed: September 24, 2015
    Publication date: May 3, 2018
    Inventors: Luis Miguel Vaquero Gonzalez, Suksant Sae Lor
  • Publication number: 20180121506
    Abstract: Example embodiments relate to solve a graph route into a set of possible relationship chains. The example disclosed herein receives a graph route, identifies an edge expansion wildcard based on the graph route, expands the graph route into a plurality of sub-graph routes based on the edge expansion wildcard, solves the plurality of sub-graph routes in parallel into a plurality of sub-graph routes results, and joins the plurality of sub-graph routes results into a set of possible relationship chains.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Inventors: Marco Aurelio Barbosa Fagnani Gomes Lotz, James Brook, Luis Miguel Vaquero Gonzalez
  • Publication number: 20180121501
    Abstract: Example embodiments relate to translate a GQL query into a SQL query. The example disclosed herein receives a graph query language (GQL) query, transforms the GQL query into a representation of an abstract syntactic structure of the GQL query, translates the representation of the abstract syntactic structure of the GQL query into a structured query language (SQL) query, and sends the SQL query to a relational database management system.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Inventors: Luis Miguel Vaquero Gonzalez, Marco Aurelio Barbosa Fagnani Gomes Lotz
  • Publication number: 20180032603
    Abstract: Example embodiments relate to extract graph topology from a plurality of databases. The example disclosed herein access metadata from a plurality of distributed databases. The example further access a set of predetermined rules to transform the accessed metadata into a graph description schema. The example finalizes when the visualization of the graph description schema is built.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 1, 2018
    Inventors: Luis Miguel VAQUERO GONZALEZ, Marco Aurelio Barbosa Fagnani Gomes Lotz