Abstract: In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.

Abstract: A device is disclosed. A storage device may include storage for a data and a controller to manage access to the storage. A network interface device may send the data across a network. A host interface may receive a request for the storage device or the network interface device.

Abstract: A multi-function device is disclosed. The multi-function device may include a first connector for communicating with a storage device, a second connector for communicating with a first computational storage unit, a third connector for communicating with a second computational storage unit, and a fourth connector for communicating with a host processor. The multi-function device is configured to expose the storage device and the first computational storage unit to the host processor via the fourth connector.

Abstract: A system and method for decentralized data processing includes receiving, by a first data processing unit of a data processing unit array, a user request and sending, by the first data processing unit, the user request to at least one of other data processing units of the data processing unit array. Each of the first data processing unit and the other data processing units include a dedicated non-volatile memory. The system and method also include receiving, by the first data processing unit, a code of execution results from each of the other data processing units that execute the user request, combining, by the first data processing unit, the code of execution results from the each of the other data processing units that execute the user request, and responding, by the first data processing unit, to the user request by transmitting the combined code of execution results.

Abstract: In some implementations, a computing system is provided. The computing system includes a device. The device includes a non-volatile memory divided into a plurality of memory sub-arrays. Each memory sub-array comprises a plurality of selectable locations. A plurality of data processing units are communicatively coupled to the non-volatile memory in the absence of a central processing unit of the computing system. The data processing unit is assigned to process data of a memory sub-array, and configured to store the first data object in the non-volatile memory receive a first data object via a communication interface. The first data object comprises a first content and is associated with a first set of keywords. The data processing unit is also configured to add the first set of keywords to a local dictionary. The local dictionary is stored in the non-volatile memory. The data processing unit is further configured to determine whether the first data object is related to one or more other data objects.

Abstract: A system and method for allocating memory to a heterogeneous address space includes identifying, by an operating system, at least one superset feature from an application configured to be executed on a host device. The address space associated with the application includes a plurality of supersets, and wherein the operating system allocates the memory to each of the plurality of supersets from a non-volatile memory or a volatile memory based upon the at least one superset feature.

Abstract: In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.

Abstract: A computing unit includes a data processing unit having a plurality of executable memory cells. Each of the plurality of executable memory cells includes a code portion for storing code, a data portion for storing data, and an arithmetic and logic unit for applying the code to the data. The computing system also includes a compilation unit for converting a sequence of instructions into an execution stream. The execution stream includes the code and the data that is executed by the plurality of executable memory cells.

Abstract: In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.

Abstract: A memory system includes a memory having a first executable memory cell and a compilation unit. The compilation unit is configured to receive a sequence of instructions from a host device, convert each of the sequence of instructions into an execution stream, load a first code from the execution stream into a code portion of the first executable memory cell and load a first data from the execution stream into a data portion of the first executable memory cell. The first executable memory cell is configured to apply the first code to the first data via an arithmetic and logic unit of the first executable memory cell.

Abstract: In some implementations, a computing system is provided. The computing system includes a device. The device includes a non-volatile memory divided into a plurality of memory sub-arrays. Each memory sub-array comprises a plurality of selectable locations. A plurality of data processing units are communicatively coupled to the non-volatile memory in the absence of a central processing unit of the computing system. The data processing unit is assigned to process data of a memory sub-array, and configured to store the first data object in the non-volatile memory receive a first data object via a communication interface. The first data object comprises a first content and is associated with a first set of keywords. The data processing unit is also configured to add the first set of keywords to a local dictionary. The local dictionary is stored in the non-volatile memory. The data processing unit is further configured to determine whether the first data object is related to one or more other data objects.

Abstract: A computing unit includes a data processing unit having a plurality of executable memory cells. Each of the plurality of executable memory cells includes a code portion for storing code, a data portion for storing data, and an arithmetic and logic unit for applying the code to the data. The computing system also includes a compilation unit for converting a sequence of instructions into an execution stream. The execution stream includes the code and the data that is executed by the plurality of executable memory cells.

Abstract: A memory system includes a memory having a first executable memory cell and a compilation unit. The compilation unit is configured to receive a sequence of instructions from a host device, convert each of the sequence of instructions into an execution stream, load a first code from the execution stream into a code portion of the first executable memory cell and load a first data from the execution stream into a data portion of the first executable memory cell. The first executable memory cell is configured to apply the first code to the first data via an arithmetic and logic unit of the first executable memory cell.

Abstract: A system and method for allocating memory to a heterogeneous address space includes identifying, by an operating system, at least one superset feature from an application configured to be executed on a host device. The address space associated with the application includes a plurality of supersets, and wherein the operating system allocates the memory to each of the plurality of supersets from a non-volatile memory or a volatile memory based upon the at least one superset feature.

Abstract: A system and method for decentralized data processing includes receiving, by a first data processing unit of a data processing unit array, a user request and sending, by the first data processing unit, the user request to at least one of other data processing units of the data processing unit array. Each of the first data processing unit and the other data processing units include a dedicated non-volatile memory. The system and method also include receiving, by the first data processing unit, a code of execution results from each of the other data processing units that execute the user request, combining, by the first data processing unit, the code of execution results from the each of the other data processing units that execute the user request, and responding, by the first data processing unit, to the user request by transmitting the combined code of execution results.

Abstract: Systems and methods are disclosed for recovering from various types of data and process corruptions at a data processing unit of a plurality of data processing units each coupled with a non-volatile memory divided into a plurality of selectable locations, in a system absent a central processing unit. In some embodiments a data processing unit is configured to determine validity of an allocation table of the data processing unit, retrieve a process descriptor from the allocation table, parse the non-volatile memory for a first set of process data corresponding to the process descriptor, determine validity of the first set of process data corresponding to the process descriptor and attempt to recover the first set of process data in accordance with a determination that the first set of process data is invalid.

Abstract: Systems and methods are disclosed for maintaining a status of a respective data processing unit (DPU) of a plurality of data processing units, each coupled to non-volatile memory. In some embodiments a first DPU is configured to execute one or more persistent processes, wherein the one or more processes persist in the non-volatile memory over power cycles, generate a first broadcast message upon completion of a first persistent process, transmit the first broadcast message to a set of DPUs associated with monitoring the first DPU, receive a second broadcast message from a second DPU of the set of DPUs and assign a value indicating an active status for the second DPU in a status table to track the status of each DPU of the set of DPUs.

Abstract: Systems and methods for offloading data transformation from a host to a hybrid solid state drive (HSSD) are described. In one such method, the HSSD receives initial data from the host and stores the data at a first non-volatile memory (NVM). The HSSD receives a transformation command from the host to offload data transformation. The HSSD copies the data from the first NVM to a second NVM that is configured to provide a finer granularity of data access than that of the first NVM. Then the HSSD transforms the data at the second NVM utilizing the configured processing circuit. The HSSD may store the result in the first NVM and/or second NVM, and send it to the host.

Abstract: Systems and methods are disclosed for recovering from various types of data and process corruptions at a data processing unit of a plurality of data processing units each coupled with a non-volatile memory divided into a plurality of selectable locations, in a system absent a central processing unit. In some embodiments a first data processing unit is configured to receive instructions to execute a parent process from a second data processing unit and transmit instructions to execute a child process associated with the parent process to a third data processing unit. The first data processing unit may further be configured to determine occurrence of a process failure at the third data processing unit and re-assign the child process for execution.

Abstract: Systems and methods are disclosed for recovering from various types of data and process corruptions at a data processing unit of a plurality of data processing units each coupled with a non-volatile memory divided into a plurality of selectable locations, in a system absent a central processing unit. In some embodiments a data processing unit is configured to determine validity of an allocation table of the data processing unit, retrieve a process descriptor from the allocation table, parse the non-volatile memory for a first set of process data corresponding to the process descriptor, determine validity of the first set of process data corresponding to the process descriptor and attempt to recover the first set of process data in accordance with a determination that the first set of process data is invalid.