Patents by Inventor Luu Thanh Nguyen
Luu Thanh Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11450638Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.Type: GrantFiled: September 1, 2020Date of Patent: September 20, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dibyajat Mishra, Ashok Prabhu, Tomoko Noguchi, Luu Thanh Nguyen, Anindya Poddar, Makoto Yoshino, Hau Nguyen
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Patent number: 11410875Abstract: An electronic device (100) includes a substrate (110) and an integrated circuit (120) provided on the substrate (110) having a surface facing away from the substrate (110). An insulating layer (150) extends over the substrate (110) and around the integrated circuit (120) to define an interface (154) between the insulating layer (150) and the integrated circuit (120). An electrically conductive via (130) is provided on the surface of the integrated circuit (120). An insulating material (140) extends over the via (130) and includes an opening (142) exposing a portion of the via (130). A repassivation member (162) extends over the insulating layer (150) and has a surface (164) aligned with the interface (154). An electrically conductive redistribution member (181) is electrically connected to the via (130) and extends over the repassivation member (162) into contact with the insulating layer (150).Type: GrantFiled: December 19, 2018Date of Patent: August 9, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hau Thanh Nguyen, Woochan Kim, Yi Yan, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar, Masamitsu Matsuura, Kengo Aoya, Mutsumi Masumoto
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Patent number: 11367699Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: GrantFiled: September 1, 2020Date of Patent: June 21, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hiroyuki Sada, Shoichi Iriguchi, Genki Yano, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar, Yi Yan, Hau Nguyen
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Publication number: 20210351098Abstract: In a described example, a packaged semiconductor device includes: a semiconductor die with a component proximate to a surface of the semiconductor die; the semiconductor die mounted on a substrate. The component is covered with a first polymer layer with a first modulus and at least a portion of the first polymer layer is covered by at least one second polymer layer with a second modulus and the second modulus is greater than the first modulus. The semiconductor die and a portion of the substrate are covered with mold compound.Type: ApplicationFiled: May 11, 2021Publication date: November 11, 2021Inventor: Luu Thanh Nguyen
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Patent number: 11031311Abstract: In a described example, a packaged semiconductor device includes: a semiconductor die with a component proximate to a surface of the semiconductor die; the semiconductor die mounted on a substrate. The component is covered with a first polymer layer with a first modulus and at least a portion of the first polymer layer is covered by at least one second polymer layer with a second modulus and the second modulus is greater than the first modulus. The semiconductor die and a portion of the substrate are covered with mold compound.Type: GrantFiled: November 21, 2018Date of Patent: June 8, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Luu Thanh Nguyen
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Patent number: 11021786Abstract: In a described example, a method for passivating a copper structure includes: passivating a surface of the copper structure with a copper corrosion inhibitor layer; and depositing a protection overcoat layer with a thickness less than 35 ?m on a surface of the copper corrosion inhibitor layer.Type: GrantFiled: December 4, 2018Date of Patent: June 1, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Luu Thanh Nguyen, Mahmud Halim Chowdhury, Ashok Prabhu, Anindya Poddar
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Patent number: 10938975Abstract: A calling user initiates a telephonic communication with a receiving user by dialing a phone number of the receiving user in his or her address book. The communication is transmitted from the calling user's device to the receiving user's device through a network that is not using Internet protocol or Internet-based, e.g., Transmission Control Protocol (TCP), Internet Protocol (IP), TCP-IP, or Voice over Internet Protocol (VoIP). After a number of notifications has passed on the receiving user's device and the receiving user is not able to answer the telephonic communication, a local voicemail recorder will be activated to record and store the telephonic communication for later retrieval by the receiving user. The stored communication is identifier by a sequence of string containing at least one of a name, a telephone number, a storage location, a date-time attribute, and a duration associated with the stored communication.Type: GrantFiled: December 25, 2017Date of Patent: March 2, 2021Inventors: Chi Luu Ngoc Nguyen, Chuong Luu Thanh Nguyen
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Publication number: 20210035932Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: ApplicationFiled: September 1, 2020Publication date: February 4, 2021Inventors: Hiroyuki SADA, Shoichi IRIGUCHI, Genki YANO, Luu Thanh NGUYEN, Ashok PRABHU, Anindya PODDAR, Yi YAN, Hau NGUYEN
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Publication number: 20200402938Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.Type: ApplicationFiled: September 1, 2020Publication date: December 24, 2020Inventors: Dibyajat Mishra, Ashok Prabhu, Tomoko Noguchi, Luu Thanh Nguyen, Anindya Poddar, Makoto Yoshino, Hau Nguyen
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Publication number: 20200388508Abstract: In described examples, a method of printing repassivation onto a substrate includes depositing an ink comprising particles of a repassivation material onto specified locations on a surface of the substrate using an inkjet printer, and curing the repassivation material.Type: ApplicationFiled: June 4, 2019Publication date: December 10, 2020Inventors: Makoto Shibuya, Daiki Komatsu, Yi Yan, Hau Nguyen, Luu Thanh Nguyen
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Patent number: 10763231Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.Type: GrantFiled: July 27, 2018Date of Patent: September 1, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dibyajat Mishra, Ashok Prabhu, Tomoko Noguchi, Luu Thanh Nguyen, Anindya Poddar, Makoto Yoshino, Hau Nguyen
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Patent number: 10763230Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: GrantFiled: December 21, 2018Date of Patent: September 1, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hiroyuki Sada, Shoichi Iriguchi, Genki Yano, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar, Yi Yan, Hau Nguyen
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Publication number: 20200203219Abstract: An electronic device (100) includes a substrate (110) and an integrated circuit (120) provided on the substrate (110) having a surface facing away from the substrate (110). An insulating layer (150) extends over the substrate (110) and around the integrated circuit (120) to define an interface (154) between the insulating layer (150) and the integrated circuit (120). An electrically conductive via (130) is provided on the surface of the integrated circuit (120). An insulating material (140) extends over the via (130) and includes an opening (142) exposing a portion of the via (130). A repassivation member (162) extends over the insulating layer (150) and has a surface (164) aligned with the interface (154). An electrically conductive redistribution member (181) is electrically connected to the via (130) and extends over the repassivation member (162) into contact with the insulating layer (150).Type: ApplicationFiled: December 19, 2018Publication date: June 25, 2020Inventors: Hau Thanh Nguyen, Woochan Kim, Yi Yan, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar, Masamitsu Matsuura, Kengo Aoya, Mutsumi Masumoto
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Publication number: 20200203295Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: ApplicationFiled: December 21, 2018Publication date: June 25, 2020Inventors: Hiroyuki SADA, Shoichi IRIGUCHI, Genki YANO, Luu Thanh NGUYEN, Ashok PRABHU, Anindya PODDAR, Yi YAN, Hau NGUYEN
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Publication number: 20200173013Abstract: In a described example, a method for passivating a copper structure includes: passivating a surface of the copper structure with a copper corrosion inhibitor layer; and depositing a protection overcoat layer with a thickness less than 35 ?m on a surface of the copper corrosion inhibitor layer.Type: ApplicationFiled: December 4, 2018Publication date: June 4, 2020Inventors: Luu Thanh Nguyen, Mahmud Halim Chowdhury, Ashok Prabhu, Anindya Poddar
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Publication number: 20200161205Abstract: In a described example, a packaged semiconductor device includes: a semiconductor die with a component proximate to a surface of the semiconductor die; the semiconductor die mounted on a substrate. The component is covered with a first polymer layer with a first modulus and at least a portion of the first polymer layer is covered by at least one second polymer layer with a second modulus and the second modulus is greater than the first modulus. The semiconductor die and a portion of the substrate are covered with mold compound.Type: ApplicationFiled: November 21, 2018Publication date: May 21, 2020Inventor: Luu Thanh Nguyen
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Patent number: 10650957Abstract: Apparatus to form a transformer, an inductor, a capacitor or other passive electronic component, with patterned conductive features in a lamination structure, and one or more ferrite sheets or other magnetic core structures attached to the lamination structure via one or more inkjet printed magnetic adhesive layers that join the magnetic core structure or structures to the lamination structure.Type: GrantFiled: October 31, 2018Date of Patent: May 12, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yi Yan, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar
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Publication number: 20200135381Abstract: Apparatus to form a transformer, an inductor, a capacitor or other passive electronic component, with patterned conductive features in a lamination structure, and one or more ferrite sheets or other magnetic core structures attached to the lamination structure via one or more inkjet printed magnetic adhesive layers that join the magnetic core structure or structures to the lamination structure.Type: ApplicationFiled: October 31, 2018Publication date: April 30, 2020Inventors: Yi Yan, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar
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Publication number: 20200105453Abstract: In examples, a device includes a plurality of magnetic layers comprising magnetic ink residue; and a plurality of metallic layers comprising metallic ink residue and coupled to the plurality of magnetic layers, the plurality of metallic layers coupled to each other to form a coil.Type: ApplicationFiled: October 1, 2018Publication date: April 2, 2020Inventors: Yi YAN, Luu Thanh NGUYEN, Ashok PRABHU, Anindya PODDAR
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Publication number: 20200043878Abstract: Described examples provide integrated circuits and methods, including forming a conductive seed layer at least partially above a conductive feature of a wafer, forming a conductive structure on at least a portion of the conductive seed layer, performing a printing process that forms a polymer material on a side of the wafer proximate a side of the conductive structure, curing the deposited polymer material, and attaching a solder ball structure to a side of the conductive structure.Type: ApplicationFiled: August 2, 2018Publication date: February 6, 2020Applicant: Texas Instruments IncorporatedInventors: Daiki Komatsu, Makoto Shibuya, Yi Yan, Hau Nguyen, Luu Thanh Nguyen, Anindya Poddar