Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.

Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.

Abstract: Substrate shrinkage that occurs during manufacture of an electronic assembly is compensated for by the incorporation of a horizontal line, having a plurality of vertical graduations, across a horizontal portion of a substrate and a vertical line, having a plurality of horizontal graduations, across a vertical portion of the substrate. The substrate is then cured and an amount of substrate shrinkage is determined, based upon a location change in the graduations of the horizontal and vertical lines. In this manner, solder can be properly provided on solder pads of the substrate responsive to the amount of substrate shrinkage. As such, electronic components can be properly mounted to the solder pads of the substrate.

Abstract: An electronics assembly is provided including a circuit board substrate having a top surface and a bottom surface and a plurality of thermal conductive vias extending from the top surface to the bottom surface. At least one electronics package is mounted to the top surface of the substrate. A heat sink device is in thermal communication with the bottom surface of the substrate. Thermal conductive vias are in thermal communication to pass thermal energy from the at least one electronics package to the heat sink. At least some of the thermal conductive vias are formed extending from the top surface to the bottom surface of the substrate at an angle.

Abstract: The present invention provides a method for producing an electronic assembly and an electronic assembly with an integrated cooling system for dissipating heat. The electronic assembly comprises a base; and at least one electrical component attached to the base. The base defines an integrated cooling system having a fluid channel spanning within the base and at least one heat exchanger in heat communication with the fluid channel. The integrated cooling system may further include a pump attached to the base for directing the flow of the fluid within the fluid channel, and a port in fluid communication with the fluid channel for receiving fluid from an external source.

Abstract: An electronic assembly includes a first substrate and a second substrate. The first substrate includes a first surface having a first plurality of conductive traces formed on an electrically non-conductive layer. The second substrate includes a first surface having a second plurality of conductive traces formed thereon and a second surface having a third plurality of conductive traces formed thereon. A first electronic component is electrically coupled to one or more of the plurality of conductive traces on the first surface of the second substrate. At least one of a plurality of conductive interconnects is incorporated within each solder joint that electrically couples one or more of the conductive traces formed on the second surface of the second substrate to one or more of the conductive traces formed on the first substrate.

Abstract: An electronic assembly includes a first substrate and a second substrate. The first substrate includes a first surface having a first plurality of conductive traces formed on an electrically non-conductive layer. The second substrate includes a first surface having a second plurality of conductive traces formed thereon and a second surface having a third plurality of conductive traces formed thereon. A first electronic component is electrically coupled to one or more of the plurality of conductive traces on the first surface of the second substrate. At least one of a plurality of conductive interconnects is incorporated within each solder joint that electrically couples one or more of the conductive traces formed on the second surface of the second substrate to one or more of the conductive traces formed on the first substrate.

Abstract: A thick-film resistor component may include a thick film component formed between a thick-film resistor and an electrically conductive sheet, wherein a portion of the sheet is selectively removed to form resistor contacts while exposing a portion of the thick-film component. Electrical terminals to a thick-film resistor may be sized to reduce stress and/or be selectively positioned relative to the resistor to define a desired resistor value. A thick-film resistor may include one or more resistor segments configured to be selectively open-circuited to incrementally adjust the value of the resistor.

Abstract: A circuit for measuring mechanical stress impressed on a printed circuit board includes a number of electrically conductive pads formed on at least one outer surface of the printed circuit board, and a resistive material applied in a pattern to the printed circuit board and defining a resistor between first and second ones of the number of electrically conductive pads. The resistive material exhibits an electrical resistance that varies as the resistive material is deformed so that the resistor exhibits an electrical resistance value that varies as a function of mechanical stress impressed on the printed circuit board sufficient to deform the resistive material defining the resistor. Any number of such resistors may be formed on or within the printed circuit board, and any such resistor may form part of an external resistor bridge network configured to monitor changes in its resistance value.

Abstract: A circuit for measuring mechanical stress impressed on a printed circuit board includes a number of electrically conductive pads formed on at least one outer surface of the printed circuit board, and a resistive material applied in a pattern to the printed circuit board and defining a resistor between first and second ones of the number of electrically conductive pads. The resistive material exhibits an electrical resistance that varies as the resistive material is deformed so that the resistor exhibits an electrical resistance value that varies as a function of mechanical stress impressed on the printed circuit board sufficient to deform the resistive material defining the resistor. Any number of such resistors may be formed on or within the printed circuit board, and any such resistor may form part of an external resistor bridge network configured to monitor changes in its resistance value.