Abstract: A method for forming a field emission flat panel display includes deposit a conductive patterned layer on a substrate, depositing an emitter material over the patterned layer, patterning the emitter material to provide a series of mask caps, etching the emitter material to provide arrays of emitter peaks with the mask caps thereon, depositing a dielective layer on the patterned layer and on the mask caps, depositing a conductive gate layer on the dielectric layer, depositing a high-resistivity dielectric layer on the gate layer, depositing a low-resistivity dielectric layer on the high-resistivity dielectric layer, and etching away portions of the dielectric layer, gate layer, high-resistivity dielectric layer and low-resistivity dielectric layer to expose the mask caps, and removing the mask caps to expose the emitter peaks to provide an emitter cathode panel, providing a transparent panel having a conductive coating thereon, and depositing a layer of thin film phosphors on the conductive coating to provide

Abstract: An optically transparent and electrically conductive film is patterned on a ubstrate, for instance in an electro-optical display device such as an electroluminescent device having a patterned transparent electrode layer, by a process utilizing a double masking structure that provides for more positive delineation of thin film device patterns. In this process, an indium tin oxide layer is formed between a metallic pattern on a glass substrate and a photoresist mask. The indium tin oxide layer has a metal lift-off mask under those areas that are to be removed and a photoresist protective mask over those areas that are to remain. The double masking will also provide greater protection to the electrode areas during the critical etching steps in developing an electroluminescent display.

Abstract: Disclosed is a capacitive voltage divider drive circuit for electroluminent matrix displays comprised of, for example, thin film electroluminescent capacitance type elements. The drive circuit for each display element, which exhibits a relatively low capacitance, includes a relatively large series connected capacitor which couples a drive voltage thereacross upon the closure of a first switching element. Due to voltage divider action, a relatively greater portion of the drive voltage appears across and energizes the display element by exceeding its threshold voltage. Additionally, another relatively large capacitor is coupled in parallel with the display element upon the closure of a second switching element which, again due to voltage divider action, reduces the drive voltage thereacross below its energizing threshold level to deenergize it.