Patents by Inventor Machiko Horiike
Machiko Horiike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10553637Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: GrantFiled: September 4, 2018Date of Patent: February 4, 2020Assignee: Sony CorporationInventors: Kazuichiroh Itonaga, Machiko Horiike
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Publication number: 20190074319Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: ApplicationFiled: September 4, 2018Publication date: March 7, 2019Applicant: Sony CorporationInventors: Kazuichiroh Itonaga, Machiko Horiike
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Patent number: 10115763Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: GrantFiled: September 28, 2017Date of Patent: October 30, 2018Assignee: Sony CorporationInventors: Kazuichiroh Itonaga, Machiko Horiike
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Publication number: 20180019279Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: ApplicationFiled: September 28, 2017Publication date: January 18, 2018Inventors: Kazuichiroh Itonaga, Machiko Horiike
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Patent number: 9812490Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: GrantFiled: April 9, 2014Date of Patent: November 7, 2017Assignee: Sony CorporationInventors: Kazuichiroh Itonaga, Machiko Horiike
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Patent number: 9087760Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.Type: GrantFiled: June 25, 2013Date of Patent: July 21, 2015Assignee: SONY CORPORATIONInventors: Kazuichiro Itonaga, Machiko Horiike
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Patent number: 8946798Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.Type: GrantFiled: June 18, 2013Date of Patent: February 3, 2015Assignee: Sony CorporationInventors: Machiko Horiike, Kazuichiro Itonaga
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Publication number: 20140217542Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: ApplicationFiled: April 9, 2014Publication date: August 7, 2014Applicant: Sony CorporationInventors: Kazuichiroh Itonaga, Machiko Horiike
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Patent number: 8742524Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: GrantFiled: December 6, 2011Date of Patent: June 3, 2014Assignee: Sony CorporationInventors: Kazuichiroh Itonaga, Machiko Horiike
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Publication number: 20130285186Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.Type: ApplicationFiled: June 25, 2013Publication date: October 31, 2013Inventors: Kazuichiro Itonaga, Machiko Horiike
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Publication number: 20130278807Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.Type: ApplicationFiled: June 18, 2013Publication date: October 24, 2013Inventors: Machiko Horiike, Kazuchiro Itonaga
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Patent number: 8519459Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.Type: GrantFiled: October 14, 2011Date of Patent: August 27, 2013Assignee: Sony CorporationInventors: Machiko Horiike, Kazuchiro Itonaga
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Patent number: 8514308Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.Type: GrantFiled: December 8, 2010Date of Patent: August 20, 2013Assignee: Sony CorporationInventors: Kazuichiro Itonaga, Machiko Horiike
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Publication number: 20120153419Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.Type: ApplicationFiled: December 6, 2011Publication date: June 21, 2012Applicant: SONY CORPORATIONInventors: Kazuichiroh Itonaga, Machiko Horiike
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Publication number: 20120098081Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.Type: ApplicationFiled: October 14, 2011Publication date: April 26, 2012Applicant: SONY CORPORATIONInventors: Machiko Horiike, Kazuichiro Itonaga
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Publication number: 20110157445Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.Type: ApplicationFiled: December 8, 2010Publication date: June 30, 2011Applicant: SONY CORPORATIONInventors: Kazuichiro Itonaga, Machiko Horiike