Patents by Inventor Machiko Horiike

Machiko Horiike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10553637
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: February 4, 2020
    Assignee: Sony Corporation
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Publication number: 20190074319
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 7, 2019
    Applicant: Sony Corporation
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Patent number: 10115763
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: October 30, 2018
    Assignee: Sony Corporation
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Publication number: 20180019279
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Application
    Filed: September 28, 2017
    Publication date: January 18, 2018
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Patent number: 9812490
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: November 7, 2017
    Assignee: Sony Corporation
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Patent number: 9087760
    Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: July 21, 2015
    Assignee: SONY CORPORATION
    Inventors: Kazuichiro Itonaga, Machiko Horiike
  • Patent number: 8946798
    Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Machiko Horiike, Kazuichiro Itonaga
  • Publication number: 20140217542
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Application
    Filed: April 9, 2014
    Publication date: August 7, 2014
    Applicant: Sony Corporation
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Patent number: 8742524
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: June 3, 2014
    Assignee: Sony Corporation
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Publication number: 20130285186
    Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.
    Type: Application
    Filed: June 25, 2013
    Publication date: October 31, 2013
    Inventors: Kazuichiro Itonaga, Machiko Horiike
  • Publication number: 20130278807
    Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.
    Type: Application
    Filed: June 18, 2013
    Publication date: October 24, 2013
    Inventors: Machiko Horiike, Kazuchiro Itonaga
  • Patent number: 8519459
    Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: August 27, 2013
    Assignee: Sony Corporation
    Inventors: Machiko Horiike, Kazuchiro Itonaga
  • Patent number: 8514308
    Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: August 20, 2013
    Assignee: Sony Corporation
    Inventors: Kazuichiro Itonaga, Machiko Horiike
  • Publication number: 20120153419
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 21, 2012
    Applicant: SONY CORPORATION
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Publication number: 20120098081
    Abstract: A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween.
    Type: Application
    Filed: October 14, 2011
    Publication date: April 26, 2012
    Applicant: SONY CORPORATION
    Inventors: Machiko Horiike, Kazuichiro Itonaga
  • Publication number: 20110157445
    Abstract: A semiconductor device comprising a first semiconductor section including a first wiring layer at one side thereof, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other, a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication.
    Type: Application
    Filed: December 8, 2010
    Publication date: June 30, 2011
    Applicant: SONY CORPORATION
    Inventors: Kazuichiro Itonaga, Machiko Horiike