Patents by Inventor Mahesh Deshmane

Mahesh Deshmane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for controlling unit specific junction temperature with high temporal resolution for concurrent central processing unit (CPU) core testing
    Patent number: 11808813
    Abstract: An apparatus includes a processor configured to control an automatic test equipment (ATE) to measure one or more parameters of a current test instance for testing a device under test (DUT), during execution of the current test instance on the DUT, and determine, based on the measured one or more parameters, one or more controls for controlling a temperature of a thermal head connected to the DUT so that a junction temperature of the DUT corresponds to a predetermined test temperature. The processor is further configured to control the temperature of the thermal head, based on the determined one or more controls.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: November 7, 2023
    Assignee: Intel Corporation
    Inventors: Mahesh Deshmane, Shoujie He, Christopher Wade Ackerman, Jacob Hales, Johnny Mata Vega, Joseph Zearing
  • APPARATUS AND METHOD FOR CONTROLLING UNIT SPECIFIC JUNCTION TEMPERATURE WITH HIGH TEMPORAL RESOLUTION FOR CONCURRENT CENTRAL PROCESSING UNIT (CPU) CORE TESTING
    Publication number: 20230288480
    Abstract: An apparatus includes a processor configured to control an automatic test equipment (ATE) to measure one or more parameters of a current test instance for testing a device under test (DUT), during execution of the current test instance on the DUT, and determine, based on the measured one or more parameters, one or more controls for controlling a temperature of a thermal head connected to the DUT so that a junction temperature of the DUT corresponds to a predetermined test temperature. The processor is further configured to control the temperature of the thermal head, based on the determined one or more controls.
    Type: Application
    Filed: March 11, 2022
    Publication date: September 14, 2023
    Inventors: Mahesh DESHMANE, Shoujie HE, Christopher Wade ACKERMAN, Jacob HALES, Johnny MATA VEGA, Joseph ZEARING
  • Slew rate control mechanism
    Publication number: 20050071706
    Abstract: According to one embodiment a computer system is disclosed. The computer system includes a bus and a chipset coupled to the bus. The chipset detects the slew rate of a signal transmitted over the bus by the chipset. In addition the chipset adjusts the slew rate based upon the state of the signal.
    Type: Application
    Filed: September 29, 2003
    Publication date: March 31, 2005
    Inventors: Mahesh Deshmane, Mark Beiley, Luke Johnson