Abstract: A VGI system is a system in which electric power is exchanged between a power grid of an electric power utility company and a BEV, and includes a plurality of BEVs, EVSE, and a management server that manages exchange of electric power. The EVSE includes specific EVSE available to a specific vehicle among BEVs, the specific vehicle being permanently permitted to use the EVSE. The management server performs processing for temporarily permitting use of the specific EVSE by a non-specific vehicle different from the specific vehicle on condition that the non-specific vehicle uses the specific EVSE to exchange electric power with the electric power utility company and performs processing for granting an incentive to a user of the non-specific vehicle or a manager of the specific EVSE on condition that the non-specific vehicle has exchanged electric power with the electric power utility company.

Abstract: An object of the present invention is to provide a water purification filter comprising activated carbon as a filtration material and a biodegradable polymer as a binder component, which water purification filter has a filtration flow rate sufficient for practical use as a pot-type water purifier while maintaining a certain free residual chlorine filtration capacity, and has a certain degree of hardness and excellent handleability. Provided is a water purification filter obtained by winding a nonwoven sheet containing fibrous activated carbon and a heat fusible core-sheath composite fiber and then heat fusing the sheet, wherein the heat fusible core-sheath composite fiber includes a sheath portion containing a biodegradable polyester resin having a melting point of 80 to 140° C. and a core portion containing a synthetic resin having a melting point at least 20° C. higher than the melting point of the biodegradable polyester resin, and wherein the water purification filter has a density of 0.12 to 0.

Abstract: Disclosed are a positive electrode active material and a method for producing an olivine-type phosphate. The positive electrode active material comprises an olivine-type phosphate represented by the following formula (I), wherein the maximum peak in an X-ray diffraction pattern obtained using a CuK? ray is the peak of the (031) plane of the olivine-type phosphate and the half-value width of the peak is 1.5° or less: AaMbPO4 (I), wherein A represents one or more elements selected from among alkali metals; M represents one or more elements selected from among transition metals; a is from 0.5 to 1.5; and b is from 0.5 to 1.5. The method for producing an olivine-type phosphate comprises preparing a raw material comprising element A, element M, and phosphorus (P) so that a A:M:P molar ratio may be a:b:1, preliminary calcining the raw material, and mainly calcining the preliminary calcined raw material.

Abstract: Disclosed are a positive electrode active material and a method for producing an olivine-type phosphate. The positive electrode active material comprises an olivine-type phosphate represented by the following formula (I), wherein the maximum peak in an X-ray diffraction pattern obtained using a CuK? ray is the peak of the (031) plane of the olivine-type phosphate and the half-value width of the peak is 1.5° or less: AaMbPO4 (I), wherein A represents one or more elements selected from among alkali metals; M represents one or more elements selected from among transition metals; a is from 0.5 to 1.5; and b is from 0.5 to 1.5. The method for producing an olivine-type phosphate comprises preparing a raw material comprising element A, element M, and phosphorus (P) so that a A:M:P molar ratio may be a:b:1, preliminary calcining the raw material, and mainly calcining the preliminary calcined raw material.

Abstract: There is provided a method for forming a trench type element isolation structure wherein no recess develops in the edge part of an imbedded oxide film of a trench type element isolation. Thermal oxidation films having higher etching resistance than the CVD film are formed not only on the surroundings of the imbedded oxide film inside the groove formed on the silicon substrate but also on the lateral sides of the imbedded oxide film projecting upward from the silicon substrate surface.

Abstract: A method of manufacturing a semiconductor device having a microminiture trench isolation in which an insulating film is embedded by an HDP-CVD method comprising: a step of pre-planarization by conducting a dry etching selectively with respect to the insulating film laminated excessively on the surface of substrate, which is to be an active region, and a step of polishing by a CMP method in order to improve a surface planarity of the insulating film, wherein an etching mask used at the time of opening a trench opening portion has a multi-layer structure including a silicon nitride film and a polycrystal silicon film; the polycrystal silicon film is used as an etching stopper at the time of pre-planarization; and the silicon nitride film is used as an etching stopper at the time of polishing by a CMP method in order to remove simultaneously the excessive insulating film and the polycrystal silicon film to expose and a surface of the substrate, which is the active region, whereby the trench isolation having a sa

Abstract: A semiconductor device comprising a semiconductor substrate, a trench formed in the substrate and having an inner wall including a sidewall and a bottom surface, a silicon oxide film deposited on the inner wall, and a buried oxide film deposited on the silicon oxide film to bury the trench, wherein the sidewall has portions of a sidewall sloped at a first profile angle A1, a second profile angle A2 and a third profile angle A3 from a surface of the substrate toward the bottom surface of the trench, and the profile angles have a relationship of A1<A2, A3<A2 and A1<83°.

Abstract: A trench (21) is formed in a silicon substrate (1) on which an underlying oxide film (2) and a silicon nitride film (3) are formed. Then, a silicon oxide (11) is deposited by an HDP-CVD method to fill the trench (21) with the oxide. Further, a resist (41) including a second resist portion (42), and a resist (43) are formed. The silicon oxide film (11) that is not covered with the resists (41) and (43), is removed by dry etching. Etch selectivity of the silicon oxide film (11) to the stopper film (3) is not less than a value (2(c−a)/d) obtained by dividing twice a value (c−a) which is obtained by subtracting an alignment margin (a) from the maximum film thickness (c) of the silicon oxide film (11), by the film thickness (d) of the stopper film (3). The resists (41) and (43) are then removed, and the residual silicon oxide film (11B, 11DC, 11DE, 11FE) is polished and removed by the CMP method. This forms a trench type element isolation with no depression at its edge portion.

Abstract: There is provided a trench type element isolation structure wherein no recess develops in the edge part of an imbedded oxide film of a trench type element isolation. Thermal oxidation films having higher etching resistance than a CVD film are formed not only on the surroundings of the imbedded oxide film inside the groove formed on the silicon substrate but also on the lateral sides of the imbedded oxide film projecting upward from the silicon substrate surface.

Abstract: The present invention provides a semiconductor device which includes trench-type element isolation which performs accurate alignment without deteriorating a device capability, and a method of manufacturing such a semiconductor device. Since a dummy gate electrode (14A) is formed in an edge proximity region of a trench (10A), a structure which does not create an etching remainder is realized. In addition, since a height difference is provided in a surface of the dummy gate electrode (14A) in such a manner that the height difference reflects a preliminary height difference between a surface of a silicon oxide films (2A) and a surface of a silicon substrate (1), it is possible to use the dummy gate electrode itself (14A) as an alignment mark.

Abstract: An underlaid silicon oxide film (2) and a polycrystalline silicon film (5) are formed in this order on a surface (1S) of a silicon substrate (1). The polycrystalline silicon film (5) and the underlaid silicon oxide (2) are opened by anisotropic etching, to form a trench (21) extending to the inside of the semiconductor substrate (1). A silicon oxide film (11) formed by HDP-CVD is buried in the trench (21). A resist (41) is formed only on a surface of the silicon oxide film (11) in a device isolation region (20). The silicon oxide film (11) in an active region (30) is removed by dry etching with the resist (41) as a mask. After removing the resist (41), only the polycrystalline silicon film (5) is removed by dry etching. The underlaid oxide film (2) is removed by wet etching with hydrofluoric acid. By this method of manufacturing a semiconductor device, the surface of the semiconductor substrate and a trench-type device isolation are flattened effectively at low cost.

Abstract: In a semiconductor device with a trench-type element isolation structure, alignment can be performed with high accuracy without any deterioration in device performance. The surfaces of silicon oxide films (2B, 2C) embedded in trenches (10B, 10C) of an element forming region including a memory cell region (11B) and a peripheral circuit region (11C) in a semiconductor substrate (1), respectively, are almost level with the surface of the semiconductor substrate (1). On the other hand, the surface of a silicon oxide film (2A) embedded in a trench (10A) is formed lower than the surface of the semiconductor substrate (1).

Abstract: A semiconductor device comprising a semiconductor substrate, a trench formed in the substrate and having an inner wall including a sidewall and a bottom surface, a silicon oxide film deposited on the inner wall, and a buried oxide film deposited on the silicon oxide film to bury the trench, wherein the sidewall has portions of a sidewall sloped at a first profile angle A1, a second profile angle A2 and a third profile angle A3 from a surface of the substrate toward the bottom surface of the trench, and the profile angles have a relationship of A1<A2, A3<A2 and A1<83.degree..

Abstract: An insulator (5) is a frame element for covering the outer edges of the active region (3), and protrudes upwardly above the surface of a semiconductor substrate (1) to constitute part of the inner walls of a trench (9) filled with an insulating film (2). A gate oxide film (21) is formed on the surface of the active region (3) adjacent the center thereof. The etching rate of the insulator (5) is lower than that of the insulating film (2). The insulator (5) prevents the sidewalls of the insulating film (2) from being etched away to suppress the formation of the depression positioned lower than the surface of the semiconductor substrate (1), thereby to alleviate influences upon an electric field adjacent the outer edges of the active region (3).

Abstract: The present invention provides a semiconductor device which includes trench-type element isolation which performs accurate alignment without deteriorating a device capability, and a method of manufacturing such a semiconductor device. Since a dummy gate electrode (14A) is formed in an edge proximity region of a trench (10A), a structure which does not create an etching remainder is realized. In addition, since a height difference is provided in a surface of the dummy gate electrode (14A) in such a manner that the height difference reflects a preliminary height difference between a surface of a silicon oxide films (2A) and a surface of a silicon substrate (1), it is possible to use the dummy gate electrode itself (14A) as an alignment mark.