Patents by Inventor Maki Hasegawa

Maki Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11302569
    Abstract: A method for manufacturing a semiconductor device according to the present invention includes the steps of (a) preparing a lead frame including a power chip die pad to which two terminals are connected, a control element die pad to which one terminal is connected, and tie bar portions connecting between a plurality of terminals including the two terminals, (b) placing a power chip and a free wheel diode on the power chip die pad and placing ICs on the control element die pad, (c) encapsulating in a mold resin to allow the tie bar portions to be exposed outside and a plurality of terminals including the two terminals and the one terminal to protrude outward, and (d) removing the tie bar portions other than the tie bar portions connecting the two terminals.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: April 12, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shuhei Yokoyama, Seiya Sugimachi, Maki Hasegawa, Kosuke Yamaguchi, Shogo Shibata
  • Publication number: 20220055366
    Abstract: An image forming apparatus includes: an extraction unit configured to extract an image for position detection from job image data; a first image forming unit configured to form the image for position detection on a recording medium; a second image forming unit disposed on a downstream in a feeding direction of the recording medium relative to the first image forming unit; a first detection unit configured to detect the image for position detection formed by the first image forming unit; and a determining unit configured to determine a correction amount of an image forming position of the second image forming unit based on a position of the image for position detection that is detected by the detection unit and a position of the image for position detection in the image data.
    Type: Application
    Filed: December 22, 2020
    Publication date: February 24, 2022
    Inventors: Chikara Manabe, Masato Matsuzuki, Yoshiyuki Taguchi, Kunio Miyakoshi, Maki Hasegawa, Masashi Hiratsuka
  • Patent number: 11254122
    Abstract: An image forming apparatus includes: an extraction unit configured to extract an image for position detection from job image data; a first image forming unit configured to form the image for position detection on a recording medium; a second image forming unit disposed on a downstream in a feeding direction of the recording medium relative to the first image forming unit; a first detection unit configured to detect the image for position detection formed by the first image forming unit; and a determining unit configured to determine a correction amount of an image forming position of the second image forming unit based on a position of the image for position detection that is detected by the detection unit and a position of the image for position detection in the image data.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: February 22, 2022
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Chikara Manabe, Masato Matsuzuki, Yoshiyuki Taguchi, Kunio Miyakoshi, Maki Hasegawa, Masashi Hiratsuka
  • Patent number: 11257732
    Abstract: A semiconductor module includes: a semiconductor element; a first lead frame including a first portion on which the semiconductor element is mounted; a sealing member sealing the semiconductor element and the first portion; and a heat dissipation member which is integrated with the sealing member and dissipates heat generated in the semiconductor element. The heat dissipation member is insulated from the semiconductor element and the first portion by the sealing member. Therefore, the semiconductor module that is applicable to vertical semiconductor elements and ensures electrical insulation between the semiconductor element and the heat dissipation member when implementing the semiconductor module onto a circuit board, can be provided.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: February 22, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Maki Hasegawa, Shuhei Yokoyama, Shogo Shibata, Shigeru Mori, Toru Iwagami
  • Patent number: 11214057
    Abstract: An ejection apparatus includes: a first ejection unit configured to eject droplets on a recording medium conveyed in a conveyance direction to form an image for detection; a first detection unit disposed downstream of the first ejection unit and configured to detect the image for detection; a second ejection unit disposed downstream of the detection unit and configured to eject droplets on the recording medium; and a control unit configured to: predict a first elongation amount of the recording medium based on a first difference between a first set time period and a first detection time period from a reference time point to a first detection time point when the image for detection is detected by the first detection unit; and perform delay control on the second ejection unit for delaying an ejection timing of the second ejection unit based on the predicted elongation amount.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: January 4, 2022
    Assignee: FUIFIIM Business Imovation Corp.
    Inventors: Masato Matsuzuki, Yoshiyuki Taguchi, Chikara Manabe, Kunio Miyakoshi, Maki Hasegawa
  • Patent number: 11186100
    Abstract: An image processing apparatus includes a processor. The processor is configured to set an image position of a reference image in a transport direction of a recording medium to an arbitrary position on a specific page of the recording medium. The reference image is formed using a first color and serves as a reference for an image position of an image of a second color to be formed after the image of the first color is formed. The processor is also configured to adjust the image position for the second color on an adjacent page, located adjacently upstream of the specific page in the transport direction, by using image information of the reference image formed on the specific page.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: November 30, 2021
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Maki Hasegawa, Kunio Miyakoshi, Masato Matsuzuki, Yoshiyuki Taguchi, Chikara Manabe
  • Patent number: 11173736
    Abstract: An image forming apparatus includes an image forming unit, first and second detectors, and a corrector. The image forming unit includes first and second image forming units disposed downstream of the first unit in a transport direction of a recording medium and causes the first and second units to form predetermined correction images onto the recording medium. The first detector is disposed downstream of the first unit and upstream of the second unit in the transport direction, and detects the correction image formed by the first unit. The second detector is disposed downstream of the second unit in the transport direction and detects the correction image formed by the second unit. The corrector corrects an image position of the second unit in a width direction of the recording medium by using the correction images formed by the first and second units and detected by the first and second detectors.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 16, 2021
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Kunio Miyakoshi, Masato Matsuzuki, Yoshiyuki Taguchi, Maki Hasegawa, Chikara Manabe
  • Patent number: 11069602
    Abstract: The present invention is a semiconductor module including: first and second drive circuits that perform drive control of at least one pair of first and second switching devices, in which the at least one pair of first and second switching devices and the first and second drive circuits are sealed in a package having a rectangular shape in plan view, and there are provided: a control terminal provided to protrude from a side surface of a first long side out of first and second long sides of the package, and to which a control signal of the first and second drive circuits is inputted; an output terminal provided to protrude from a side surface of the second long side; a first main terminal provided to protrude from a side surface of a first short side out of first and second short sides of the package; and a second main terminal provided to protrude from a side surface of the second short side.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: July 20, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shuhei Yokoyama, Shogo Shibata, Maki Hasegawa, Koichiro Noguchi, Shigeru Mori, Toru Iwagami
  • Publication number: 20210154996
    Abstract: An ejection apparatus includes: a first ejection unit configured to eject droplets on a recording medium conveyed in a conveyance direction to form an image for detection; a first detection unit disposed downstream of the first ejection unit and configured to detect the image for detection; a second ejection unit disposed downstream of the detection unit and configured to eject droplets on the recording medium; and a control unit configured to: predict a first elongation amount of the recording medium based on a first difference between a first set time period and a first detection time period from a reference time point to a first detection time point when the image for detection is detected by the first detection unit; and perform delay control on the second ejection unit for delaying an ejection timing of the second ejection unit based on the predicted elongation amount.
    Type: Application
    Filed: March 20, 2020
    Publication date: May 27, 2021
    Inventors: Masato Matsuzuki, Yoshiyuki Taguchi, Chikara Manabe, Kunio Miyakoshi, Maki Hasegawa
  • Publication number: 20210070070
    Abstract: An image processing apparatus includes a processor. The processor is configured to set an image position of a reference image in a transport direction of a recording medium to an arbitrary position on a specific page of the recording medium. The reference image is formed using a first color and serves as a reference for an image position of an image of a second color to be formed after the image of the first color is formed. The processor is also configured to adjust the image position for the second color on an adjacent page, located adjacently upstream of the specific page in the transport direction, by using image information of the reference image formed on the specific page.
    Type: Application
    Filed: March 26, 2020
    Publication date: March 11, 2021
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Maki HASEGAWA, Kunio MIYAKOSHI, Masato MATSUZUKI, Yoshiyuki TAGUCHI, Chikara MANABE
  • Publication number: 20210075916
    Abstract: An image forming apparatus includes an image forming unit, first and second detectors, and a corrector. The image forming unit includes first and second image forming units disposed downstream of the first unit in a transport direction of a recording medium and causes the first and second units to form predetermined correction images onto the recording medium. The first detector is disposed downstream of the first unit and upstream of the second unit in the transport direction, and detects the correction image formed by the first unit. The second detector is disposed downstream of the second unit in the transport direction and detects the correction image formed by the second unit. The corrector corrects an image position of the second unit in a width direction of the recording medium by using the correction images formed by the first and second units and detected by the first and second detectors.
    Type: Application
    Filed: March 2, 2020
    Publication date: March 11, 2021
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Kunio MIYAKOSHI, Masato MATSUZUKI, Yoshiyuki TAGUCHI, Maki HASEGAWA, Chikara MANABE
  • Patent number: 10796979
    Abstract: A power module includes: a power chip; a control chip controlling the power chip; a power terminal connected to the power chip; a control terminal connected to the control chip; and a package covering the power chip, the control chip, the power terminal, and the control terminal with mold resin, wherein first and second recesses for attaching a fin are respectively provided on side faces facing each other of the package from which neither the power terminal nor the control terminal protrudes, and the first and second recesses are arranged not at positions opposite to each other but alternately.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: October 6, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Maki Hasegawa, Shuhei Yokoyama, Shigeru Mori, Hisashi Kawafuji
  • Publication number: 20200303237
    Abstract: A method for manufacturing a semiconductor device according to the present invention includes the steps of (a) preparing a lead frame including a power chip die pad to which two terminals are connected, a control element die pad to which one terminal is connected, and tie bar portions connecting between a plurality of terminals including the two terminals, (b) placing a power chip and a free wheel diode on the power chip die pad and placing ICs on the control element die pad, (c) encapsulating in a mold resin to allow the tie bar portions to be exposed outside and a plurality of terminals including the two terminals and the one terminal to protrude outward, and (d) removing the tie bar portions other than the tie bar portions connecting the two terminals.
    Type: Application
    Filed: December 16, 2019
    Publication date: September 24, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shuhei YOKOYAMA, Seiya SUGIMACHI, Maki HASEGAWA, Kosuke YAMAGUCHI, Shogo SHIBATA
  • Patent number: 10741472
    Abstract: A power module includes: a power chip; a control chip controlling the power chip; a power terminal connected to the power chip; a control terminal connected to the control chip; and a package covering the power chip, the control chip, the power terminal, and the control terminal with mold resin, wherein first and second recesses for attaching a fin are respectively provided on side faces facing each other of the package from which neither the power terminal nor the control terminal protrudes, and the first and second recesses are arranged not at positions opposite to each other but alternately.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: August 11, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Maki Hasegawa, Shuhei Yokoyama, Shigeru Mori, Hisashi Kawafuji
  • Publication number: 20200194353
    Abstract: The present invention is a semiconductor module including: first and second drive circuits that perform drive control of at least one pair of first and second switching devices, in which the at least one pair of first and second switching devices and the first and second drive circuits are sealed in a package having a rectangular shape in plan view, and there are provided: a control terminal provided to protrude from a side surface of a first long side out of first and second long sides of the package, and to which a control signal of the first and second drive circuits is inputted; an output terminal provided to protrude from a side surface of the second long side; a first main terminal provided to protrude from a side surface of a first short side out of first and second short sides of the package; and a second main terminal provided to protrude from a side surface of the second short side.
    Type: Application
    Filed: November 22, 2016
    Publication date: June 18, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shuhei YOKOYAMA, Shogo SHIBATA, Maki HASEGAWA, Koichiro NOGUCHI, Shigeru MORI, Toru IWAGAMI
  • Patent number: 10566222
    Abstract: It is an object to provide a technique capable of providing a semiconductor device with information indicating a plurality of electrical characteristics. A semiconductor device sorting system includes a characteristic measurement unit measuring electrical characteristics of a semiconductor device, a rank determination database for classifying the electrical characteristics into ranks, a calculation unit classifying the plurality of electrical characteristics of the semiconductor device measured by the characteristic measurement unit into a plurality of ranks with reference to the rank determination database, a writing unit converting the plurality of ranks classified by the calculation unit into a graphic symbolic code and forming the graphic symbolic code on the semiconductor device, a reading unit reading the plurality of ranks from the graphic symbolic code formed on the semiconductor device, and a sorting unit sorting the semiconductor device based on the plurality of ranks being read by the reading unit.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: February 18, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shuhei Yokoyama, Maki Hasegawa, Hiroyuki Nakamura, Shigeru Mori, Toru Iwagami
  • Publication number: 20190259681
    Abstract: A semiconductor module includes: a semiconductor element; a first lead frame including a first portion on which the semiconductor element is mounted; a sealing member sealing the semiconductor element and the first portion; and a heat dissipation member which is integrated with the sealing member and dissipates heat generated in the semiconductor element. The heat dissipation member is insulated from the semiconductor element and the first portion by the sealing member. Therefore, the semiconductor module that is applicable to vertical semiconductor elements and ensures electrical insulation between the semiconductor element and the heat dissipation member when implementing the semiconductor module onto a circuit board, can be provided.
    Type: Application
    Filed: November 15, 2016
    Publication date: August 22, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Maki HASEGAWA, Shuhei YOKOYAMA, Shogo SHIBATA, Shigeru MORI, Toru IWAGAMI
  • Patent number: 10332869
    Abstract: A power module includes one control IC and a plurality of reverse conducting insulated gate bipolar transistors (RC-IGBTs). The control IC has the functions of a high-voltage IC and a low-voltage IC. The plurality of RC-IGBTs are disposed on three of four sides of the control IC and connected to the control IC through only wires.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: June 25, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naoki Ikeda, Hisashi Oda, Maki Hasegawa, Hisashi Kawafuji
  • Patent number: D859334
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: September 10, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shuhei Yokoyama, Maki Hasegawa, Shigeru Mori
  • Patent number: D864135
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: October 22, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shuhei Yokoyama, Maki Hasegawa, Shigeru Mori