Patents by Inventor Makoto Kozawa
Makoto Kozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Non-transitory computer-readable recording medium, control method, and information processing device
Patent number: 11893397Abstract: Provided is a non-transitory computer-readable recording medium that stores a control program causing a computer to execute a process, the process including determining whether first microcode stored in a first area of a storage device supports a processor, and when the first microcode does not support the processor, decompressing one of multiple sets of compressed second microcode stored in a second area of the storage device into the first area.Type: GrantFiled: June 7, 2022Date of Patent: February 6, 2024Assignee: FUJITSU LIMITEDInventor: Makoto Kozawa -
NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM, CONTROL METHOD, AND INFORMATION PROCESSING DEVICE
Publication number: 20230109625Abstract: Provided is a non-transitory computer-readable recording medium that stores a control program causing a computer to execute a process, the process including determining whether first microcode stored in a first area of a storage device supports a processor, and when the first microcode does not support the processor, decompressing one of multiple sets of compressed second microcode stored in a second area of the storage device into the first area.Type: ApplicationFiled: June 7, 2022Publication date: April 6, 2023Applicant: FUJITSU LIMITEDInventor: Makoto Kozawa -
Patent number: 9916236Abstract: An information processing device includes a plurality of processors each of which is coupled to at least some of the plurality of processors. A first processor from among the plurality of processors is configured to calculate a plurality of communication paths between a second processor and a third processor from among the plurality of processors, identify a communication path that does not pass through a processor that is a target of dynamic reconfiguration, as a path to be used, from among the plurality of calculated communication paths, and transmit information on the identified path to be used, to a processor on the identified communication path. The processor that receives from the first processor the information on the identified path executes communication processing between the second processor and the third processor, by using the communication path that is indicated by the received information on the path to be used.Type: GrantFiled: April 30, 2015Date of Patent: March 13, 2018Assignee: FUJITSU LIMITEDInventors: Tomoyasu Takai, Tetsuya Kamino, Makoto Kozawa
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Patent number: 9875177Abstract: An information processing device includes a plurality of processors each of which is coupled to at least some of the plurality of processors. A first processor from among the plurality of processors is configured to calculate a plurality of communication paths between a second processor and a third processor from among the plurality of processors, identify a communication path that does not pass through a processor that is a target of dynamic reconfiguration, as a path to be used, from among the plurality of calculated communication paths, and transmit information on the identified path to be used, to a processor on the identified communication path. The processor that receives from the first processor the information on the identified path executes communication processing between the second processor and the third processor, by using the communication path that is indicated by the received information on the path to be used.Type: GrantFiled: April 30, 2015Date of Patent: January 23, 2018Assignee: FUJITSU LIMITEDInventors: Tomoyasu Takai, Tetsuya Kamino, Makoto Kozawa
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Patent number: 9747114Abstract: A SBSP writes a log into a spad in a log processor and the writing of the log from the spad to a serial port is performed by the log processor. When initialization of a main memory has been completed, the log processor temporarily writes the data read from the spad into a logmem and then clears the spad. Furthermore, when an output of the log performed by the log processor has been completed, the SBSP adds, in cooperation with the BIOS and the OS, the log processor and the logmem as the resources.Type: GrantFiled: September 10, 2014Date of Patent: August 29, 2017Assignee: FUJITSU LIMITEDInventors: Minoru Kawarabayashi, Makoto Kozawa, Yusuke Kudo, Juntaro Minezaki, Masakazu Yabe
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Publication number: 20170034120Abstract: A network device setting method for causing a computer to execute a process, the process including causing a basic input/output system to perform processing of generating network setting information in which a place identifier that identifies a place in which a network device is mounted to the computer and a network address are associated with one another; and causing an operating system to perform processing of updating, based on net information in which a device identifier that identifies the network device and the place identifier are associated with one another and the network setting information, configuration information that corresponds to the device identifier with the network address, and setting the network address in the network device using the updated configuration information.Type: ApplicationFiled: July 26, 2016Publication date: February 2, 2017Applicant: FUJITSU LIMITEDInventor: Makoto Kozawa
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Publication number: 20160132356Abstract: A management apparatus includes (A) an acceptance unit to accept an instruction to dynamically change a processor configuration in a system that includes plural processors, and (B) a processing unit to identify a performance value of a system corresponding to a processor configuration caused by instructed dynamic change, determine whether or not the identified performance value is equal to or greater than a requested performance value for the system, and perform a processing to change the processor configuration instructed by the accepted instruction, upon determining that the identified performance value is equal to or greater than the requested performance value.Type: ApplicationFiled: January 5, 2016Publication date: May 12, 2016Applicant: FUJITSU LIMITEDInventors: Makoto Kozawa, Masashi Agata
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Publication number: 20150331822Abstract: An information processing device includes a plurality of processors each of which is coupled to at least some of the plurality of processors. A first processor from among the plurality of processors is configured to calculate a plurality of communication paths between a second processor and a third processor from among the plurality of processors, identify a communication path that does not pass through a processor that is a target of dynamic reconfiguration, as a path to be used, from among the plurality of calculated communication paths, and transmit information on the identified path to be used, to a processor on the identified communication path. The processor that receives from the first processor the information on the identified path executes communication processing between the second processor and the third processor, by using the communication path that is indicated by the received information on the path to be used.Type: ApplicationFiled: April 30, 2015Publication date: November 19, 2015Applicant: FUJITSU LIMITEDInventors: Tomoyasu TAKAI, Tetsuya KAMINO, Makoto KOZAWA
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Publication number: 20150127931Abstract: A SBSP writes a log into a spad in a log processor and the writing of the log from the spad to a serial port is performed by the log processor. When initialization of a main memory has been completed, the log processor temporarily writes the data read from the spad into a logmem and then clears the spad. Furthermore, when an output of the log performed by the log processor has been completed, the SBSP adds, in cooperation with the BIOS and the OS, the log processor and the logmem as the resources.Type: ApplicationFiled: September 10, 2014Publication date: May 7, 2015Applicant: Fujitsu LimitedInventors: Minoru KAWARABAYASHI, Makoto Kozawa, Yusuke Kudo, Juntaro Minezaki, Masakazu Yabe
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Publication number: 20130326515Abstract: A device includes a memory which stores a program, and a processor which executes, based on the program, a procedure comprising deciding, based on maximum bandwidth information included in bandwidth setting information corresponding to a network device existing on a route between a physical server serving as an allocation destination candidate of a virtual machine and a gateway, maximum bandwidth information of the virtual machine, available bandwidth information of the network device, and hardware resource information of the physical server, and instructing a decided physical server to create the virtual machine.Type: ApplicationFiled: March 18, 2013Publication date: December 5, 2013Applicant: FUJITSU LIMITEDInventors: Yusuke HARA, Makoto KOZAWA, Futoshi WATANABE, Hiroshi TAKAMURE, Yoshitaka KIZUKA
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Patent number: 7486026Abstract: A lamp includes a discharge sustaining fill which includes cesium halide, one of indium halide and thallium halide, optionally gadolinium halide and a rare earth halide component selected from dysprosium halide, holmium halide, thulium halide, and neodymium halide. In operation without a jacket, the lamp may have a color temperature of from 7,000K to 14,000K and a color rendering index of at least 70 when operated at an arc wall loading in excess of about 2 W/mm2.Type: GrantFiled: November 9, 2006Date of Patent: February 3, 2009Assignees: General Electric Company, Koto Electric Co., Ltd.Inventors: Colin W. Johnston, James A. Leonard, Deeder Aurongzeb, Kazuya Abe, Makoto Kozawa
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Publication number: 20080111489Abstract: A lamp includes a discharge sustaining fill which includes cesium halide, one of indium halide and thallium halide, optionally gadolinium halide and a rare earth halide component selected from dysprosium halide, holmium halide, thulium halide, and neodymium halide. In operation without a jacket, the lamp may have a color temperature of from 7,000K to 14,000K and a color rendering index of at least 70 when operated at an arc wall loading in excess of about 2 W/mm2.Type: ApplicationFiled: November 9, 2006Publication date: May 15, 2008Inventors: Colin W. Johnston, James A. Leonard, Deeder Aurongzeb, Kazuya Abe, Makoto Kozawa